From ddb4dac13341d5b33b9e129ecb0e2abec30a27b6 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Tue, 24 Apr 2012 13:31:07 -0400 Subject: r600g/llvm: Don't duplicate R600 intrinsics installed by LLVM At this point, in order for OpenCL to work correctly with r600g, OpenCL specific intrinsics need to be defined in the LLVM tree. So, we need to check for these intrinsics in the LLVM include directory to make sure not to re-define them. --- src/gallium/drivers/radeon/Makefile | 9 +++++ src/gallium/drivers/radeon/Makefile.sources | 1 + src/gallium/drivers/radeon/R600Intrinsics.td | 40 ---------------------- .../drivers/radeon/R600IntrinsicsNoOpenCL.td | 40 ++++++++++++++++++++++ src/gallium/drivers/radeon/R600IntrinsicsOpenCL.td | 16 +++++++++ 5 files changed, 66 insertions(+), 40 deletions(-) delete mode 100644 src/gallium/drivers/radeon/R600Intrinsics.td create mode 100644 src/gallium/drivers/radeon/R600IntrinsicsNoOpenCL.td create mode 100644 src/gallium/drivers/radeon/R600IntrinsicsOpenCL.td (limited to 'src/gallium/drivers/radeon') diff --git a/src/gallium/drivers/radeon/Makefile b/src/gallium/drivers/radeon/Makefile index 807dc781c7c..13aa3605dcd 100644 --- a/src/gallium/drivers/radeon/Makefile +++ b/src/gallium/drivers/radeon/Makefile @@ -18,6 +18,8 @@ CXXFLAGS := $(filter-out -DDEBUG, $(CXXFLAGS)) tablegen = $(TBLGEN) -I $(LLVM_INCLUDEDIR) $1 $2 -o $3 +HAVE_LLVM_INTRINSICS = $(shell grep IntrinsicsR600.td $(LLVM_INCLUDEDIR)/llvm/Intrinsics.td) + gen: $(GENERATED_SOURCES) SIRegisterInfo.td: SIGenRegisterInfo.pl @@ -26,6 +28,13 @@ SIRegisterInfo.td: SIGenRegisterInfo.pl SIRegisterGetHWRegNum.inc: SIGenRegisterInfo.pl $(PERL) $^ $@ > /dev/null +R600Intrinsics.td: R600IntrinsicsNoOpenCL.td R600IntrinsicsOpenCL.td +ifeq ($(HAVE_LLVM_INTRINSICS),) + cp R600IntrinsicsNoOpenCL.td R600Intrinsics.td +else + cp R600IntrinsicsOpenCL.td R600Intrinsics.td +endif + R600ShaderPatterns.td: AMDGPUGenShaderPatterns.pl $(PERL) $^ C > $@ diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index 7d2932b4dbd..6e649152120 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -1,5 +1,6 @@ GENERATED_SOURCES := \ + R600Intrinsics.td \ R600ShaderPatterns.td \ R600RegisterInfo.td \ AMDGPUInstrEnums.td \ diff --git a/src/gallium/drivers/radeon/R600Intrinsics.td b/src/gallium/drivers/radeon/R600Intrinsics.td deleted file mode 100644 index 8038fee1a3c..00000000000 --- a/src/gallium/drivers/radeon/R600Intrinsics.td +++ /dev/null @@ -1,40 +0,0 @@ -//===-- R600Intrinsics.td - TODO: Add brief description -------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// TODO: Add full description -// -//===----------------------------------------------------------------------===// - -let TargetPrefix = "R600", isTarget = 1 in { - def int_R600_load_input : Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrReadWriteArgMem]>; -} - -let TargetPrefix = "r600", isTarget = 1 in { - -class R600ReadPreloadRegisterIntrinsic - : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, - GCCBuiltin; - -multiclass R600ReadPreloadRegisterIntrinsic_xyz { - def _x : R600ReadPreloadRegisterIntrinsic; - def _y : R600ReadPreloadRegisterIntrinsic; - def _z : R600ReadPreloadRegisterIntrinsic; -} - -defm int_r600_read_global_size : R600ReadPreloadRegisterIntrinsic_xyz < - "__builtin_r600_read_global_size">; -defm int_r600_read_local_size : R600ReadPreloadRegisterIntrinsic_xyz < - "__builtin_r600_read_local_size">; -defm int_r600_read_ngroups : R600ReadPreloadRegisterIntrinsic_xyz < - "__builtin_r600_read_ngroups">; -defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz < - "__builtin_r600_read_tgid">; -defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz < - "__builtin_r600_read_tidig">; -} // End TargetPrefix = "r600" diff --git a/src/gallium/drivers/radeon/R600IntrinsicsNoOpenCL.td b/src/gallium/drivers/radeon/R600IntrinsicsNoOpenCL.td new file mode 100644 index 00000000000..8038fee1a3c --- /dev/null +++ b/src/gallium/drivers/radeon/R600IntrinsicsNoOpenCL.td @@ -0,0 +1,40 @@ +//===-- R600Intrinsics.td - TODO: Add brief description -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TODO: Add full description +// +//===----------------------------------------------------------------------===// + +let TargetPrefix = "R600", isTarget = 1 in { + def int_R600_load_input : Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrReadWriteArgMem]>; +} + +let TargetPrefix = "r600", isTarget = 1 in { + +class R600ReadPreloadRegisterIntrinsic + : Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>, + GCCBuiltin; + +multiclass R600ReadPreloadRegisterIntrinsic_xyz { + def _x : R600ReadPreloadRegisterIntrinsic; + def _y : R600ReadPreloadRegisterIntrinsic; + def _z : R600ReadPreloadRegisterIntrinsic; +} + +defm int_r600_read_global_size : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_global_size">; +defm int_r600_read_local_size : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_local_size">; +defm int_r600_read_ngroups : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_ngroups">; +defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_tgid">; +defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz < + "__builtin_r600_read_tidig">; +} // End TargetPrefix = "r600" diff --git a/src/gallium/drivers/radeon/R600IntrinsicsOpenCL.td b/src/gallium/drivers/radeon/R600IntrinsicsOpenCL.td new file mode 100644 index 00000000000..cd761358475 --- /dev/null +++ b/src/gallium/drivers/radeon/R600IntrinsicsOpenCL.td @@ -0,0 +1,16 @@ +//===-- R600Intrinsics.td - TODO: Add brief description -------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// TODO: Add full description +// +//===----------------------------------------------------------------------===// + +let TargetPrefix = "R600", isTarget = 1 in { + def int_R600_load_input : Intrinsic<[llvm_float_ty], [llvm_i32_ty], [IntrReadWriteArgMem]>; +} -- cgit v1.2.3