From 00389100b63d03adf70892b721d1b2e8b8d5e48a Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Fri, 3 Jun 2016 20:48:01 +0200 Subject: winsys/amdgpu: enable DCC for mipmapped textures MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also add dcc_fast_clear_size for clearing only the necessary subset of DCC. For no AA, it's equal to the size of the whole DCC level. Reviewed-by: Nicolai Hähnle Reviewed-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeon/r600_texture.c | 10 +++++++--- src/gallium/drivers/radeon/radeon_winsys.h | 1 + 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/radeon') diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 27b464fa509..9daad65a04c 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -931,8 +931,11 @@ void r600_print_texture_info(struct r600_texture *rtex, FILE *f) rtex->dcc_offset, rtex->surface.dcc_size, rtex->surface.dcc_alignment); for (i = 0; i <= rtex->surface.last_level; i++) - fprintf(f, " DCCLevel[%i]: offset=%"PRIu64"\n", - i, rtex->surface.level[i].dcc_offset); + fprintf(f, " DCCLevel[%i]: enabled=%u, offset=%"PRIu64", " + "fast_clear_size=%"PRIu64"\n", + i, rtex->surface.level[i].dcc_enabled, + rtex->surface.level[i].dcc_offset, + rtex->surface.level[i].dcc_fast_clear_size); } for (i = 0; i <= rtex->surface.last_level; i++) @@ -1865,7 +1868,8 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, vi_get_fast_clear_parameters(fb->cbufs[i]->format, color, &reset_value, &clear_words_needed); rctx->clear_buffer(&rctx->b, &tex->resource.b.b, - tex->dcc_offset, tex->surface.dcc_size, + tex->dcc_offset, + tex->surface.level[0].dcc_fast_clear_size, reset_value, R600_COHERENCY_CB_META); if (clear_words_needed) diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index d7bb1654a7a..c2d1f9ef3ea 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -360,6 +360,7 @@ struct radeon_surf_level { uint32_t pitch_bytes; uint32_t mode; uint64_t dcc_offset; + uint64_t dcc_fast_clear_size; bool dcc_enabled; }; -- cgit v1.2.3