From 7786f8c63564f1eb421a8636cdbd15c471ec8632 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Thu, 27 Oct 2016 01:13:30 +0200 Subject: gallium/radeon: add enum radeon_micro_mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_texture.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/radeon/r600_texture.c') diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 7ced41c7759..693330474a3 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -2347,13 +2347,13 @@ static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen, */ if (rscreen->chip_class >= CIK) { switch (rtex->last_msaa_resolve_target_micro_mode) { - case 0: /* displayable */ + case RADEON_MICRO_MODE_DISPLAY: rtex->surface.tiling_index[0] = 10; break; - case 1: /* thin */ + case RADEON_MICRO_MODE_THIN: rtex->surface.tiling_index[0] = 14; break; - case 3: /* rotated */ + case RADEON_MICRO_MODE_ROTATED: rtex->surface.tiling_index[0] = 28; break; default: /* depth, thick */ @@ -2362,7 +2362,7 @@ static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen, } } else { /* SI */ switch (rtex->last_msaa_resolve_target_micro_mode) { - case 0: /* displayable */ + case RADEON_MICRO_MODE_DISPLAY: switch (rtex->surface.bpe) { case 1: rtex->surface.tiling_index[0] = 10; @@ -2375,7 +2375,7 @@ static void si_set_optimal_micro_tile_mode(struct r600_common_screen *rscreen, break; } break; - case 1: /* thin */ + case RADEON_MICRO_MODE_THIN: switch (rtex->surface.bpe) { case 1: rtex->surface.tiling_index[0] = 14; -- cgit v1.2.3