From e866dbd1b538ce086ef0a8b7e5ae7ae8e81a72e7 Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Thu, 13 Sep 2012 15:19:48 +0000
Subject: radeon/llvm: Add support for i8 reads on R600

---
 src/gallium/drivers/radeon/R600Instructions.td | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

(limited to 'src/gallium/drivers/radeon/R600Instructions.td')

diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td
index c9c9f611ed6..0f4bbb3a04b 100644
--- a/src/gallium/drivers/radeon/R600Instructions.td
+++ b/src/gallium/drivers/radeon/R600Instructions.td
@@ -1059,6 +1059,17 @@ class VTX_READ_eg <bits<8> buffer_id, dag outs, list<dag> pattern>
   // Inst{127-96} = 0;
 }
 
+class VTX_READ_8_eg <bits<8> buffer_id, list<dag> pattern>
+    : VTX_READ_eg <buffer_id, (outs R600_TReg32_X:$dst), pattern> {
+
+  let MEGA_FETCH_COUNT = 1;
+  let DST_SEL_X = 0;
+  let DST_SEL_Y = 7;   // Masked
+  let DST_SEL_Z = 7;   // Masked
+  let DST_SEL_W = 7;   // Masked
+  let DATA_FORMAT = 1; // FMT_8
+}
+
 class VTX_READ_32_eg <bits<8> buffer_id, list<dag> pattern>
     : VTX_READ_eg <buffer_id, (outs R600_TReg32_X:$dst), pattern> {
 
@@ -1111,6 +1122,11 @@ def VTX_READ_PARAM_f32_eg : VTX_READ_PARAM_32_eg<f32>;
 // VTX Read from global memory space
 //===----------------------------------------------------------------------===//
 
+// 8-bit reads
+def VTX_READ_GLOBAL_i8_eg : VTX_READ_8_eg <1,
+  [(set (i32 R600_TReg32_X:$dst), (zextloadi8_global ADDRVTX_READ:$ptr))]
+>;
+
 // 32-bit reads
 
 class VTX_READ_GLOBAL_eg <ValueType vt> : VTX_READ_32_eg <1,
-- 
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