From 64db3cc6ad2d52dec46119e5b80030393cb60bf4 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Thu, 30 Aug 2012 05:38:02 +0200 Subject: r600g: implement MSAA for Cayman Everything works except for blitting MSAA colorbuffers, which isn't so trivial on Cayman. It's a rarely-used feature anyway. --- src/gallium/drivers/r600/evergreen_hw_context.c | 1 + src/gallium/drivers/r600/evergreen_state.c | 196 ++++++++++++++++-------- src/gallium/drivers/r600/evergreend.h | 21 +++ src/gallium/drivers/r600/r600_blit.c | 34 +++- src/gallium/drivers/r600/r600_pipe.h | 1 + src/gallium/drivers/r600/r600_state_common.c | 3 +- 6 files changed, 184 insertions(+), 72 deletions(-) (limited to 'src/gallium/drivers/r600') diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c b/src/gallium/drivers/r600/evergreen_hw_context.c index d2f09498566..b2ea7e238dd 100644 --- a/src/gallium/drivers/r600/evergreen_hw_context.c +++ b/src/gallium/drivers/r600/evergreen_hw_context.c @@ -500,6 +500,7 @@ static const struct r600_reg cayman_context_reg_list[] = { {R_028798_CB_BLEND6_CONTROL, 0, 0}, {R_02879C_CB_BLEND7_CONTROL, 0, 0}, {R_028800_DB_DEPTH_CONTROL, 0, 0}, + {CM_R_028804_DB_EQAA}, {R_028808_CB_COLOR_CONTROL, 0, 0}, {R_02880C_DB_SHADER_CONTROL, 0, 0}, {R_028810_PA_CL_CLIP_CNTL, 0, 0}, diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 35bc391fe80..28a83f299b4 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -635,9 +635,6 @@ boolean evergreen_is_format_supported(struct pipe_screen *screen, if (rscreen->info.drm_minor < 19) return FALSE; - if (rscreen->chip_class != EVERGREEN) - return FALSE; - switch (sample_count) { case 2: case 4: @@ -1102,8 +1099,12 @@ static struct pipe_sampler_view *evergreen_create_sampler_view(struct pipe_conte view->tex_resource_words[5] = S_030014_BASE_ARRAY(state->u.tex.first_layer) | S_030014_LAST_ARRAY(state->u.tex.last_layer); if (texture->nr_samples > 1) { + unsigned log_samples = util_logbase2(texture->nr_samples); + if (rscreen->chip_class == CAYMAN) { + view->tex_resource_words[4] |= S_030010_LOG2_NUM_FRAGMENTS(log_samples); + } /* LAST_LEVEL holds log2(nr_samples) for multisample textures */ - view->tex_resource_words[5] |= S_030014_LAST_LEVEL(util_logbase2(texture->nr_samples)); + view->tex_resource_words[5] |= S_030014_LAST_LEVEL(log_samples); } else { view->tex_resource_words[4] |= S_030010_BASE_LEVEL(state->u.tex.first_level); view->tex_resource_words[5] |= S_030014_LAST_LEVEL(state->u.tex.last_level); @@ -1324,6 +1325,12 @@ void evergreen_init_color_surface(struct r600_context *rctx, S_028C74_NON_DISP_TILING_ORDER(tile_type) | S_028C74_FMASK_BANK_HEIGHT(fmask_bankh); + if (rctx->chip_class == CAYMAN && rtex->resource.b.b.nr_samples > 1) { + unsigned log_samples = util_logbase2(rtex->resource.b.b.nr_samples); + color_attrib |= S_028C74_NUM_SAMPLES(log_samples) | + S_028C74_NUM_FRAGMENTS(log_samples); + } + ntype = V_028C70_NUMBER_UNORM; if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) ntype = V_028C70_NUMBER_SRGB; @@ -1478,6 +1485,9 @@ static void evergreen_init_depth_surface(struct r600_context *rctx, S_028040_BANK_WIDTH(bankw) | S_028040_BANK_HEIGHT(bankh) | S_028040_MACRO_TILE_ASPECT(macro_aspect); + if (rscreen->chip_class == CAYMAN && rtex->resource.b.b.nr_samples > 1) { + surf->db_depth_info |= S_028040_NUM_SAMPLES(util_logbase2(rtex->resource.b.b.nr_samples)); + } surf->db_depth_base = offset; surf->db_depth_view = S_028008_SLICE_START(surf->base.u.tex.first_layer) | S_028008_SLICE_MAX(surf->base.u.tex.last_layer); @@ -1530,7 +1540,7 @@ static uint32_t evergreen_set_ms_pos(struct pipe_context *ctx, struct r600_pipe_ }; static unsigned max_dist_4x = 6; /* 8xMSAA */ - static uint32_t eg_sample_locs_8x[] = { + static uint32_t sample_locs_8x[] = { FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), @@ -1540,7 +1550,57 @@ static uint32_t evergreen_set_ms_pos(struct pipe_context *ctx, struct r600_pipe_ FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), FILL_SREG( 6, 0, 0, 0, -5, 3, 4, 4), }; - static uint32_t cm_sample_locs_8x[] = { + static unsigned max_dist_8x = 8; + struct r600_context *rctx = (struct r600_context *)ctx; + unsigned i; + + switch (nsample) { + case 2: + for (i = 0; i < Elements(sample_locs_2x); i++) { + r600_pipe_state_add_reg(rstate, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0 + i*4, + sample_locs_2x[i]); + } + return max_dist_2x; + case 4: + for (i = 0; i < Elements(sample_locs_4x); i++) { + r600_pipe_state_add_reg(rstate, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0 + i*4, + sample_locs_4x[i]); + } + return max_dist_4x; + case 8: + for (i = 0; i < Elements(sample_locs_8x); i++) { + r600_pipe_state_add_reg(rstate, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0 + i*4, + sample_locs_8x[i]); + } + return max_dist_8x; + default: + R600_ERR("Invalid nr_samples %i\n", nsample); + return 0; + } +} + +static uint32_t cayman_set_ms_pos(struct pipe_context *ctx, struct r600_pipe_state *rstate, int nsample) +{ + /* 2xMSAA + * There are two locations (-4, 4), (4, -4). */ + static uint32_t sample_locs_2x[] = { + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + FILL_SREG(-4, 4, 4, -4, -4, 4, 4, -4), + }; + static unsigned max_dist_2x = 4; + /* 4xMSAA + * There are 4 locations: (-2, -2), (2, 2), (-6, 6), (6, -6). */ + static uint32_t sample_locs_4x[] = { + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + FILL_SREG(-2, -2, 2, 2, -6, 6, 6, -6), + }; + static unsigned max_dist_4x = 6; + /* 8xMSAA */ + static uint32_t sample_locs_8x[] = { FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), FILL_SREG(-2, -5, 3, -4, -1, 5, -6, -2), @@ -1552,7 +1612,7 @@ static uint32_t evergreen_set_ms_pos(struct pipe_context *ctx, struct r600_pipe_ }; static unsigned max_dist_8x = 8; /* 16xMSAA */ - static uint32_t cm_sample_locs_16x[] = { + static uint32_t sample_locs_16x[] = { FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), FILL_SREG(-7, -3, 7, 3, 1, -5, -5, 5), @@ -1572,7 +1632,7 @@ static uint32_t evergreen_set_ms_pos(struct pipe_context *ctx, struct r600_pipe_ }; static unsigned max_dist_16x = 8; struct r600_context *rctx = (struct r600_context *)ctx; - uint32_t max_dist, num_regs, *sample_locs, i; + uint32_t max_dist, num_regs, *sample_locs; switch (nsample) { case 2: @@ -1586,55 +1646,39 @@ static uint32_t evergreen_set_ms_pos(struct pipe_context *ctx, struct r600_pipe_ max_dist = max_dist_4x; break; case 8: - if (rctx->chip_class == CAYMAN) { - sample_locs = cm_sample_locs_8x; - num_regs = Elements(cm_sample_locs_8x); - } else { - sample_locs = eg_sample_locs_8x; - num_regs = Elements(eg_sample_locs_8x); - } + sample_locs = sample_locs_8x; + num_regs = Elements(sample_locs_8x); max_dist = max_dist_8x; break; case 16: - if (rctx->chip_class == CAYMAN) { - sample_locs = cm_sample_locs_16x; - num_regs = Elements(cm_sample_locs_16x); - max_dist = max_dist_16x; - break; - } - /* fall through */ + sample_locs = sample_locs_16x; + num_regs = Elements(sample_locs_16x); + max_dist = max_dist_16x; + break; default: R600_ERR("Invalid nr_samples %i\n", nsample); return 0; } - /* All the regs must be initialized. Otherwise weird rendering may occur. */ - if (rctx->chip_class == CAYMAN) { - r600_pipe_state_add_reg(rstate, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs[0]); - r600_pipe_state_add_reg(rstate, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs[1]); - r600_pipe_state_add_reg(rstate, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs[2]); - r600_pipe_state_add_reg(rstate, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs[3]); - if (num_regs <= 8) { - r600_pipe_state_add_reg(rstate, CM_R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1, sample_locs[4]); - r600_pipe_state_add_reg(rstate, CM_R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1, sample_locs[5]); - r600_pipe_state_add_reg(rstate, CM_R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1, sample_locs[6]); - r600_pipe_state_add_reg(rstate, CM_R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1, sample_locs[7]); - } - if (num_regs <= 16) { - r600_pipe_state_add_reg(rstate, CM_R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2, sample_locs[8]); - r600_pipe_state_add_reg(rstate, CM_R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2, sample_locs[9]); - r600_pipe_state_add_reg(rstate, CM_R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2, sample_locs[10]); - r600_pipe_state_add_reg(rstate, CM_R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2, sample_locs[11]); - r600_pipe_state_add_reg(rstate, CM_R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3, sample_locs[12]); - r600_pipe_state_add_reg(rstate, CM_R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3, sample_locs[13]); - r600_pipe_state_add_reg(rstate, CM_R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3, sample_locs[14]); - r600_pipe_state_add_reg(rstate, CM_R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3, sample_locs[15]); - } - } else { - for (i = 0; i < num_regs; i++) { - r600_pipe_state_add_reg(rstate, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0 + i*4, - sample_locs[i]); - } + r600_pipe_state_add_reg(rstate, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs[0]); + r600_pipe_state_add_reg(rstate, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs[1]); + r600_pipe_state_add_reg(rstate, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs[2]); + r600_pipe_state_add_reg(rstate, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs[3]); + if (num_regs <= 8) { + r600_pipe_state_add_reg(rstate, CM_R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1, sample_locs[4]); + r600_pipe_state_add_reg(rstate, CM_R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1, sample_locs[5]); + r600_pipe_state_add_reg(rstate, CM_R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1, sample_locs[6]); + r600_pipe_state_add_reg(rstate, CM_R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1, sample_locs[7]); + } + if (num_regs <= 16) { + r600_pipe_state_add_reg(rstate, CM_R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2, sample_locs[8]); + r600_pipe_state_add_reg(rstate, CM_R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2, sample_locs[9]); + r600_pipe_state_add_reg(rstate, CM_R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2, sample_locs[10]); + r600_pipe_state_add_reg(rstate, CM_R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2, sample_locs[11]); + r600_pipe_state_add_reg(rstate, CM_R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3, sample_locs[12]); + r600_pipe_state_add_reg(rstate, CM_R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3, sample_locs[13]); + r600_pipe_state_add_reg(rstate, CM_R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3, sample_locs[14]); + r600_pipe_state_add_reg(rstate, CM_R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3, sample_locs[15]); } return max_dist; } @@ -1647,7 +1691,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, struct r600_surface *surf; struct r600_resource *res; struct r600_texture *rtex; - uint32_t tl, br, i, nr_samples; + uint32_t tl, br, i, nr_samples, log_samples; if (rstate == NULL) return; @@ -1702,7 +1746,9 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, r600_pipe_state_add_reg(rstate, R_028C88_CB_COLOR0_FMASK_SLICE + i * 0x3c, surf->cb_color_fmask_slice); - if (rtex->fmask_size && rtex->cmask_size) { + /* Cayman can fetch from a compressed MSAA colorbuffer, + * so it's pointless to track them. */ + if (rctx->chip_class != CAYMAN && rtex->fmask_size && rtex->cmask_size) { rctx->compressed_cb_mask |= 1 << i; } } @@ -1775,27 +1821,43 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, nr_samples = 0; if (nr_samples > 1) { - unsigned log_samples = util_logbase2(nr_samples); - unsigned max_dist, line_cntl, aa_config; - - max_dist = evergreen_set_ms_pos(ctx, rstate, nr_samples); - - line_cntl = S_028C00_LAST_PIXEL(1) | - S_028C00_EXPAND_LINE_WIDTH(1); - aa_config = S_028C04_MSAA_NUM_SAMPLES(log_samples) | - S_028C04_MAX_SAMPLE_DIST(max_dist); + unsigned line_cntl = S_028C00_LAST_PIXEL(1) | + S_028C00_EXPAND_LINE_WIDTH(1); + log_samples = util_logbase2(nr_samples); if (rctx->chip_class == CAYMAN) { + unsigned max_dist = cayman_set_ms_pos(ctx, rstate, nr_samples); + r600_pipe_state_add_reg(rstate, CM_R_028BDC_PA_SC_LINE_CNTL, line_cntl); - r600_pipe_state_add_reg(rstate, CM_R_028BE0_PA_SC_AA_CONFIG, aa_config); + r600_pipe_state_add_reg(rstate, CM_R_028BE0_PA_SC_AA_CONFIG, + S_028BE0_MSAA_NUM_SAMPLES(log_samples) | + S_028BE0_MAX_SAMPLE_DIST(max_dist) | + S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); + r600_pipe_state_add_reg(rstate, CM_R_028804_DB_EQAA, + S_028804_MAX_ANCHOR_SAMPLES(log_samples) | + S_028804_PS_ITER_SAMPLES(log_samples) | + S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) | + S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) | + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); } else { + unsigned max_dist = evergreen_set_ms_pos(ctx, rstate, nr_samples); + r600_pipe_state_add_reg(rstate, R_028C00_PA_SC_LINE_CNTL, line_cntl); - r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG, aa_config); + r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG, + S_028C04_MSAA_NUM_SAMPLES(log_samples) | + S_028C04_MAX_SAMPLE_DIST(max_dist)); } } else { + log_samples = 0; + if (rctx->chip_class == CAYMAN) { r600_pipe_state_add_reg(rstate, CM_R_028BDC_PA_SC_LINE_CNTL, S_028C00_LAST_PIXEL(1)); r600_pipe_state_add_reg(rstate, CM_R_028BE0_PA_SC_AA_CONFIG, 0); + r600_pipe_state_add_reg(rstate, CM_R_028804_DB_EQAA, + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); + } else { r600_pipe_state_add_reg(rstate, R_028C00_PA_SC_LINE_CNTL, S_028C00_LAST_PIXEL(1)); r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG, 0); @@ -1819,6 +1881,11 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, rctx->alphatest_state.bypass = false; r600_atom_dirty(rctx, &rctx->alphatest_state.atom); } + + if (rctx->chip_class == CAYMAN && rctx->db_misc_state.log_samples != log_samples) { + rctx->db_misc_state.log_samples = log_samples; + r600_atom_dirty(rctx, &rctx->db_misc_state.atom); + } } static void evergreen_emit_cb_misc_state(struct r600_context *rctx, struct r600_atom *atom) @@ -1849,6 +1916,9 @@ static void evergreen_emit_db_misc_state(struct r600_context *rctx, struct r600_ if (a->occlusion_query_enabled) { db_count_control |= S_028004_PERFECT_ZPASS_COUNTS(1); + if (rctx->chip_class == CAYMAN) { + db_count_control |= S_028004_SAMPLE_RATE(a->log_samples); + } db_render_override |= S_02800C_NOOP_CULL_DISABLE(1); } @@ -2214,8 +2284,6 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx) r600_store_value(cb, 0); /* CM_R_0288E8_SQ_LDS_ALLOC */ r600_store_value(cb, 0); /* R_0288EC_SQ_LDS_ALLOC_PS */ - r600_store_context_reg(cb, CM_R_028804_DB_EQAA, 0x110000); - r600_store_context_reg_seq(cb, R_028380_SQ_VTX_SEMANTIC_0, 34); r600_store_value(cb, 0); /* R_028380_SQ_VTX_SEMANTIC_0 */ r600_store_value(cb, 0); diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h index 0c56aa6f693..91d78f81ee1 100644 --- a/src/gallium/drivers/r600/evergreend.h +++ b/src/gallium/drivers/r600/evergreend.h @@ -378,6 +378,9 @@ #define S_028C74_BANK_HEIGHT(x) (((x) & 0x3) << 16) #define S_028C74_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 19) #define S_028C74_FMASK_BANK_HEIGHT(x) (((x) & 0x3) << 22) +#define S_028C74_NUM_SAMPLES(x) (((x) & 0x7) << 24) /* cayman only */ +#define S_028C74_NUM_FRAGMENTS(x) (((x) & 0x3) << 27) /* cayman only */ +#define S_028C74_FORCE_DST_ALPHA_1(x) (((x) & 0x1) << 31) /* cayman only */ #define R_028C78_CB_COLOR0_DIM 0x028C78 #define S_028C78_WIDTH_MAX(x) (((x) & 0xFFFF) << 0) @@ -542,6 +545,7 @@ #define V_028040_Z_16 0x00000001 #define V_028040_Z_24 0x00000002 #define V_028040_Z_32_FLOAT 0x00000003 +#define S_028040_NUM_SAMPLES(x) (((x) & 0x3) << 2) /* cayman only */ #define S_028040_ARRAY_MODE(x) (((x) & 0xF) << 4) #define G_028040_ARRAY_MODE(x) (((x) >> 4) & 0xF) #define C_028040_ARRAY_MODE 0xFFFFFF0F @@ -1050,6 +1054,7 @@ #define S_030010_ENDIAN_SWAP(x) (((x) & 0x3) << 12) #define G_030010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3) #define C_030010_ENDIAN_SWAP 0xFFFFCFFF +#define S_030010_LOG2_NUM_FRAGMENTS(x) (((x) & 0x3) << 14) /* cayman only */ #define S_030010_DST_SEL_X(x) (((x) & 0x7) << 16) #define G_030010_DST_SEL_X(x) (((x) >> 16) & 0x7) #define C_030010_DST_SEL_X 0xFFF8FFFF @@ -1574,6 +1579,7 @@ #define R_028004_DB_COUNT_CONTROL 0x00028004 #define S_028004_ZPASS_INCREMENT_DISABLE (((x) & 0x1) << 0) #define S_028004_PERFECT_ZPASS_COUNTS(x) (((x) & 0x1) << 1) +#define S_028004_SAMPLE_RATE(x) (((x) & 0x7) << 4) /* cayman only */ #define R_028008_DB_DEPTH_VIEW 0x00028008 #define S_028008_SLICE_START(x) (((x) & 0x7FF) << 0) #define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) @@ -2224,11 +2230,26 @@ #define CM_R_0288E8_SQ_LDS_ALLOC 0x000288E8 #define CM_R_028804_DB_EQAA 0x00028804 +#define S_028804_MAX_ANCHOR_SAMPLES(x) (((x) & 0x7) << 0) +#define S_028804_PS_ITER_SAMPLES(x) (((x) & 0x7) << 4) +#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) & 0x7) << 8) +#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) & 0x7) << 12) +#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) & 0x1) << 16) +#define S_028804_INCOHERENT_EQAA_READS(x) (((x) & 0x1) << 17) +#define S_028804_INTERPOLATE_COMP_Z(x) (((x) & 0x1) << 18) +#define S_028804_INTERPOLATE_SRC_Z(x) (((x) & 0x1) << 19) +#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) & 0x1) << 20) +#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) & 0x1) << 21) #define CM_R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x00028BD4 #define CM_R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x00028BD8 #define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc #define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 +#define S_028BE0_MSAA_NUM_SAMPLES(x) (((x) & 0x7) << 0) +#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) & 0x1) << 4) +#define S_028BE0_MAX_SAMPLE_DIST(x) (((x) & 0xf) << 13) +#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) & 0x7) << 20) +#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) & 0x3) << 24) #define CM_R_028BE4_PA_SU_VTX_CNTL 0x28be4 #define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x28be8 #define CM_R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x28bec diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 5f39e0d54e1..072df143f13 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -260,6 +260,8 @@ static void r600_blit_decompress_color(struct pipe_context *ctx, struct r600_context *rctx = (struct r600_context *)ctx; unsigned layer, level, checked_last_layer, max_layer; + assert(rctx->chip_class != CAYMAN); + if (!rtex->dirty_level_mask) return; @@ -304,6 +306,13 @@ void r600_decompress_color_textures(struct r600_context *rctx, unsigned i; unsigned mask = textures->compressed_colortex_mask; + /* Cayman cannot decompress an MSAA colorbuffer, + * but it can read it compressed, so skip this. */ + assert(rctx->chip_class != CAYMAN); + if (rctx->chip_class == CAYMAN) { + return; + } + while (mask) { struct pipe_sampler_view *view; struct r600_texture *tex; @@ -341,7 +350,7 @@ static void r600_copy_first_sample(struct pipe_context *ctx, info->src.layer, info->src.layer, 0, 0); } - if (rsrc->fmask_size && rsrc->cmask_size) { + if (rctx->chip_class != CAYMAN && rsrc->fmask_size && rsrc->cmask_size) { r600_blit_decompress_color(ctx, rsrc, 0, 0, info->src.layer, info->src.layer); @@ -399,6 +408,8 @@ static void r600_color_resolve(struct pipe_context *ctx, struct pipe_screen *screen = ctx->screen; struct pipe_resource *tmp, templ; struct pipe_box box; + unsigned sample_mask = + rctx->chip_class == CAYMAN ? ~0 : ((1ull << MAX2(1, info->src.res->nr_samples)) - 1); assert((info->mask & PIPE_MASK_RGBA) == PIPE_MASK_RGBA); @@ -407,7 +418,7 @@ static void r600_color_resolve(struct pipe_context *ctx, util_blitter_custom_resolve_color(rctx->blitter, info->dst.res, info->dst.level, info->dst.layer, info->src.res, info->src.layer, - rctx->custom_blend_resolve); + sample_mask, rctx->custom_blend_resolve); r600_blitter_end(ctx); return; } @@ -432,7 +443,7 @@ static void r600_color_resolve(struct pipe_context *ctx, util_blitter_custom_resolve_color(rctx->blitter, tmp, 0, 0, info->src.res, info->src.layer, - rctx->custom_blend_resolve); + sample_mask, rctx->custom_blend_resolve); r600_blitter_end(ctx); /* this is correct for upside-down blits too */ @@ -685,7 +696,7 @@ static void r600_resource_copy_region(struct pipe_context *ctx, src_box->z, src_box->z + src_box->depth - 1, 0, u_max_sample(src)); } - if (rsrc->fmask_size && rsrc->cmask_size) { + if (rctx->chip_class != CAYMAN && rsrc->fmask_size && rsrc->cmask_size) { r600_blit_decompress_color(ctx, rsrc, src_level, src_level, src_box->z, src_box->z + src_box->depth - 1); } @@ -748,11 +759,20 @@ static void r600_resource_copy_region(struct pipe_context *ctx, restore_orig[1] = TRUE; } - for (i = 0; i <= last_sample; i++) { + /* XXX Properly implement multisample textures on Cayman. In the meantime, + * copy only the first sample (which is the only one that doesn't return garbage). */ + if (rctx->chip_class == CAYMAN) { r600_blitter_begin(ctx, R600_COPY_TEXTURE); - util_blitter_copy_texture(rctx->blitter, dst, dst_level, 1 << i, dstx, dsty, dstz, - src, src_level, i, psbox); + util_blitter_copy_texture(rctx->blitter, dst, dst_level, ~0, dstx, dsty, dstz, + src, src_level, 0, psbox); r600_blitter_end(ctx); + } else { + for (i = 0; i <= last_sample; i++) { + r600_blitter_begin(ctx, R600_COPY_TEXTURE); + util_blitter_copy_texture(rctx->blitter, dst, dst_level, 1 << i, dstx, dsty, dstz, + src, src_level, i, psbox); + r600_blitter_end(ctx); + } } if (restore_orig[0]) diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 8c718a7d202..721334d1e84 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -83,6 +83,7 @@ struct r600_db_misc_state { bool flush_depthstencil_through_cb; bool copy_depth, copy_stencil; unsigned copy_sample; + unsigned log_samples; }; struct r600_cb_misc_state { diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index e8801329d3f..68f53c64eb0 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -631,7 +631,8 @@ void r600_set_sampler_views(struct pipe_context *pipe, dst->views.compressed_depthtex_mask &= ~(1 << i); } - if (rtex->cmask_size && rtex->fmask_size) { + /* Track compressed colorbuffers for Evergreen (Cayman doesn't need this). */ + if (rctx->chip_class != CAYMAN && rtex->cmask_size && rtex->fmask_size) { dst->views.compressed_colortex_mask |= 1 << i; } else { dst->views.compressed_colortex_mask &= ~(1 << i); -- cgit v1.2.3