From 50880314e35661f0ea7ab3f092741df79c855d90 Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Wed, 19 Dec 2012 09:56:17 -0500 Subject: Revert "r600g: work around ddx over alignment" This reverts commit d8287bac1fd4a77abc2db38de134f14176740d23. Cause more issue than it fix. Need to think of a proper solution. --- src/gallium/drivers/r600/r600_texture.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'src/gallium/drivers/r600') diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c index 937345156c3..56e9b64fc47 100644 --- a/src/gallium/drivers/r600/r600_texture.c +++ b/src/gallium/drivers/r600/r600_texture.c @@ -89,8 +89,7 @@ static int r600_init_surface(struct r600_screen *rscreen, struct radeon_surface *surface, const struct pipe_resource *ptex, unsigned array_mode, - bool is_flushed_depth, - bool from_ddx) + bool is_flushed_depth) { const struct util_format_description *desc = util_format_description(ptex->format); @@ -108,10 +107,6 @@ static int r600_init_surface(struct r600_screen *rscreen, surface->array_size = 1; surface->last_level = ptex->last_level; - if (from_ddx) { - surface->npix_y = align(surface->npix_y, 8); - } - if (rscreen->chip_class >= EVERGREEN && !is_flushed_depth && ptex->format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) { surface->bpe = 4; /* stencil is allocated separately on evergreen */ @@ -544,8 +539,7 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen, } r = r600_init_surface(rscreen, &surface, templ, array_mode, - templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH, - false); + templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH); if (r) { return NULL; } @@ -633,7 +627,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen, else array_mode = V_038000_ARRAY_LINEAR_ALIGNED; - r = r600_init_surface(rscreen, &surface, templ, array_mode, false, true); + r = r600_init_surface(rscreen, &surface, templ, array_mode, false); if (r) { return NULL; } -- cgit v1.2.3