From 3206d4ed44e761186fee3c679801e57f8ce923cb Mon Sep 17 00:00:00 2001 From: Grazvydas Ignotas Date: Mon, 10 Aug 2015 00:42:32 +0300 Subject: gallium/radeon: use helper functions to mark atoms dirty MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is analogous to r300_mark_atom_dirty() used by r300, and will be used by later patches. For common radeon code, appropriate helper is called through a function pointer. No functional changes. Signed-off-by: Marek Olšák --- src/gallium/drivers/r600/evergreen_compute.c | 2 +- src/gallium/drivers/r600/evergreen_state.c | 28 +++++------ src/gallium/drivers/r600/r600_blit.c | 16 +++--- src/gallium/drivers/r600/r600_hw_context.c | 54 ++++++++++---------- src/gallium/drivers/r600/r600_pipe.c | 1 + src/gallium/drivers/r600/r600_pipe.h | 25 ++++++++-- src/gallium/drivers/r600/r600_state.c | 28 +++++------ src/gallium/drivers/r600/r600_state_common.c | 75 ++++++++++++++-------------- 8 files changed, 123 insertions(+), 106 deletions(-) (limited to 'src/gallium/drivers/r600') diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index d89e3de9cc6..51003309654 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -163,7 +163,7 @@ static void evergreen_cs_set_vertex_buffer( rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE; state->enabled_mask |= 1 << vb_index; state->dirty_mask |= 1 << vb_index; - state->atom.dirty = true; + r600_mark_atom_dirty(rctx, &state->atom); } static void evergreen_cs_set_constant_buffer( diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index 13ecc46959f..bb5338304ea 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -896,7 +896,7 @@ static void evergreen_set_scissor_states(struct pipe_context *ctx, for (i = start_slot; i < start_slot + num_scissors; i++) { rctx->scissor[i].scissor = state[i - start_slot]; - rctx->scissor[i].atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->scissor[i].atom); } } @@ -1346,11 +1346,11 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, if (rctx->alphatest_state.bypass != alphatest_bypass) { rctx->alphatest_state.bypass = alphatest_bypass; - rctx->alphatest_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); } if (rctx->alphatest_state.cb0_export_16bpc != export_16bpc) { rctx->alphatest_state.cb0_export_16bpc = export_16bpc; - rctx->alphatest_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); } } @@ -1366,28 +1366,28 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, if (state->zsbuf->format != rctx->poly_offset_state.zs_format) { rctx->poly_offset_state.zs_format = state->zsbuf->format; - rctx->poly_offset_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->poly_offset_state.atom); } if (rctx->db_state.rsurf != surf) { rctx->db_state.rsurf = surf; - rctx->db_state.atom.dirty = true; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_state.atom); + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } else if (rctx->db_state.rsurf) { rctx->db_state.rsurf = NULL; - rctx->db_state.atom.dirty = true; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_state.atom); + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } if (rctx->cb_misc_state.nr_cbufs != state->nr_cbufs) { rctx->cb_misc_state.nr_cbufs = state->nr_cbufs; - rctx->cb_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); } if (state->nr_cbufs == 0 && rctx->alphatest_state.bypass) { rctx->alphatest_state.bypass = false; - rctx->alphatest_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); } log_samples = util_logbase2(rctx->framebuffer.nr_samples); @@ -1396,7 +1396,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, rctx->b.family == CHIP_RV770) && rctx->db_misc_state.log_samples != log_samples) { rctx->db_misc_state.log_samples = log_samples; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } @@ -1424,7 +1424,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx, rctx->framebuffer.atom.num_dw += 4; } - rctx->framebuffer.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->framebuffer.atom); r600_set_sample_locations_constant_buffer(rctx); } @@ -1438,7 +1438,7 @@ static void evergreen_set_min_samples(struct pipe_context *ctx, unsigned min_sam rctx->ps_iter_samples = min_samples; if (rctx->framebuffer.nr_samples > 1) { - rctx->framebuffer.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->framebuffer.atom); } } @@ -3180,7 +3180,7 @@ void evergreen_update_db_shader_control(struct r600_context * rctx) if (db_shader_control != rctx->db_misc_state.db_shader_control) { rctx->db_misc_state.db_shader_control = db_shader_control; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 8664e036338..b0002c3b50f 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -145,7 +145,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx, rctx->db_misc_state.copy_depth = util_format_has_depth(desc); rctx->db_misc_state.copy_stencil = util_format_has_stencil(desc); rctx->db_misc_state.copy_sample = first_sample; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); for (level = first_level; level <= last_level; level++) { if (!staging && !(texture->dirty_level_mask & (1 << level))) @@ -162,7 +162,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx, if (sample != rctx->db_misc_state.copy_sample) { rctx->db_misc_state.copy_sample = sample; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } surf_tmpl.format = texture->resource.b.b.format; @@ -197,7 +197,7 @@ static void r600_blit_decompress_depth(struct pipe_context *ctx, /* reenable compression in DB_RENDER_CONTROL */ rctx->db_misc_state.flush_depthstencil_through_cb = false; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } static void r600_blit_decompress_depth_in_place(struct r600_context *rctx, @@ -210,7 +210,7 @@ static void r600_blit_decompress_depth_in_place(struct r600_context *rctx, /* Enable decompression in DB_RENDER_CONTROL */ rctx->db_misc_state.flush_depthstencil_in_place = true; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); surf_tmpl.format = texture->resource.b.b.format; @@ -248,7 +248,7 @@ static void r600_blit_decompress_depth_in_place(struct r600_context *rctx, /* Disable decompression in DB_RENDER_CONTROL */ rctx->db_misc_state.flush_depthstencil_in_place = false; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } void r600_decompress_depth_textures(struct r600_context *rctx, @@ -437,10 +437,10 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers, fb->zsbuf->u.tex.last_layer == util_max_layer(&rtex->resource.b.b, level)) { if (rtex->depth_clear_value != depth) { rtex->depth_clear_value = depth; - rctx->db_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_state.atom); } rctx->db_misc_state.htile_clear = true; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } @@ -453,7 +453,7 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers, /* disable fast clear */ if (rctx->db_misc_state.htile_clear) { rctx->db_misc_state.htile_clear = false; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index ad11e760781..d67fdfd4106 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -296,43 +296,43 @@ void r600_begin_new_cs(struct r600_context *ctx) r600_emit_command_buffer(ctx->b.rings.gfx.cs, &ctx->start_cs_cmd); /* Re-emit states. */ - ctx->alphatest_state.atom.dirty = true; - ctx->blend_color.atom.dirty = true; - ctx->cb_misc_state.atom.dirty = true; - ctx->clip_misc_state.atom.dirty = true; - ctx->clip_state.atom.dirty = true; - ctx->db_misc_state.atom.dirty = true; - ctx->db_state.atom.dirty = true; - ctx->framebuffer.atom.dirty = true; - ctx->pixel_shader.atom.dirty = true; - ctx->poly_offset_state.atom.dirty = true; - ctx->vgt_state.atom.dirty = true; - ctx->sample_mask.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->alphatest_state.atom); + r600_mark_atom_dirty(ctx, &ctx->blend_color.atom); + r600_mark_atom_dirty(ctx, &ctx->cb_misc_state.atom); + r600_mark_atom_dirty(ctx, &ctx->clip_misc_state.atom); + r600_mark_atom_dirty(ctx, &ctx->clip_state.atom); + r600_mark_atom_dirty(ctx, &ctx->db_misc_state.atom); + r600_mark_atom_dirty(ctx, &ctx->db_state.atom); + r600_mark_atom_dirty(ctx, &ctx->framebuffer.atom); + r600_mark_atom_dirty(ctx, &ctx->pixel_shader.atom); + r600_mark_atom_dirty(ctx, &ctx->poly_offset_state.atom); + r600_mark_atom_dirty(ctx, &ctx->vgt_state.atom); + r600_mark_atom_dirty(ctx, &ctx->sample_mask.atom); for (i = 0; i < R600_MAX_VIEWPORTS; i++) { - ctx->scissor[i].atom.dirty = true; - ctx->viewport[i].atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->scissor[i].atom); + r600_mark_atom_dirty(ctx, &ctx->viewport[i].atom); } - ctx->config_state.atom.dirty = true; - ctx->stencil_ref.atom.dirty = true; - ctx->vertex_fetch_shader.atom.dirty = true; - ctx->export_shader.atom.dirty = true; - ctx->shader_stages.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->config_state.atom); + r600_mark_atom_dirty(ctx, &ctx->stencil_ref.atom); + r600_mark_atom_dirty(ctx, &ctx->vertex_fetch_shader.atom); + r600_mark_atom_dirty(ctx, &ctx->export_shader.atom); + r600_mark_atom_dirty(ctx, &ctx->shader_stages.atom); if (ctx->gs_shader) { - ctx->geometry_shader.atom.dirty = true; - ctx->gs_rings.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->geometry_shader.atom); + r600_mark_atom_dirty(ctx, &ctx->gs_rings.atom); } - ctx->vertex_shader.atom.dirty = true; - ctx->b.streamout.enable_atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->vertex_shader.atom); + r600_mark_atom_dirty(ctx, &ctx->b.streamout.enable_atom); if (ctx->blend_state.cso) - ctx->blend_state.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->blend_state.atom); if (ctx->dsa_state.cso) - ctx->dsa_state.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->dsa_state.atom); if (ctx->rasterizer_state.cso) - ctx->rasterizer_state.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->rasterizer_state.atom); if (ctx->b.chip_class <= R700) { - ctx->seamless_cube_map.atom.dirty = true; + r600_mark_atom_dirty(ctx, &ctx->seamless_cube_map.atom); } ctx->vertex_buffer_state.dirty_mask = ctx->vertex_buffer_state.enabled_mask; diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index f02014e17f0..c4f5c742b9a 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -120,6 +120,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void rctx->b.b.screen = screen; rctx->b.b.priv = priv; rctx->b.b.destroy = r600_destroy_context; + rctx->b.set_atom_dirty = (void *)r600_set_atom_dirty; if (!r600_common_context_init(&rctx->b, &rscreen->b)) goto fail; diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index bcb9390f331..3653e8fd0af 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -498,29 +498,44 @@ static inline void r600_emit_command_buffer(struct radeon_winsys_cs *cs, cs->cdw += cb->num_dw; } +static inline void r600_set_atom_dirty(struct r600_context *rctx, + struct r600_atom *atom, + bool dirty) +{ + atom->dirty = dirty; +} + +static inline void r600_mark_atom_dirty(struct r600_context *rctx, + struct r600_atom *atom) +{ + r600_set_atom_dirty(rctx, atom, true); +} + void r600_trace_emit(struct r600_context *rctx); static inline void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom) { atom->emit(&rctx->b, atom); - atom->dirty = false; + r600_set_atom_dirty(rctx, atom, false); if (rctx->screen->b.trace_bo) { r600_trace_emit(rctx); } } -static inline void r600_set_cso_state(struct r600_cso_state *state, void *cso) +static inline void r600_set_cso_state(struct r600_context *rctx, + struct r600_cso_state *state, void *cso) { state->cso = cso; - state->atom.dirty = cso != NULL; + r600_set_atom_dirty(rctx, &state->atom, cso != NULL); } -static inline void r600_set_cso_state_with_cb(struct r600_cso_state *state, void *cso, +static inline void r600_set_cso_state_with_cb(struct r600_context *rctx, + struct r600_cso_state *state, void *cso, struct r600_command_buffer *cb) { state->cb = cb; state->atom.num_dw = cb ? cb->num_dw : 0; - r600_set_cso_state(state, cso); + r600_set_cso_state(rctx, state, cso); } /* compute_memory_pool.c */ diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index c28a1e14f0f..7fb03b4cff6 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -802,7 +802,7 @@ static void r600_set_scissor_states(struct pipe_context *ctx, return; for (i = start_slot ; i < start_slot + num_scissors; i++) { - rctx->scissor[i].atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->scissor[i].atom); } } @@ -1193,7 +1193,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, if (rctx->alphatest_state.bypass != alphatest_bypass) { rctx->alphatest_state.bypass = alphatest_bypass; - rctx->alphatest_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); } } @@ -1209,28 +1209,28 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, if (state->zsbuf->format != rctx->poly_offset_state.zs_format) { rctx->poly_offset_state.zs_format = state->zsbuf->format; - rctx->poly_offset_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->poly_offset_state.atom); } if (rctx->db_state.rsurf != surf) { rctx->db_state.rsurf = surf; - rctx->db_state.atom.dirty = true; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_state.atom); + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } else if (rctx->db_state.rsurf) { rctx->db_state.rsurf = NULL; - rctx->db_state.atom.dirty = true; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_state.atom); + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } if (rctx->cb_misc_state.nr_cbufs != state->nr_cbufs) { rctx->cb_misc_state.nr_cbufs = state->nr_cbufs; - rctx->cb_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); } if (state->nr_cbufs == 0 && rctx->alphatest_state.bypass) { rctx->alphatest_state.bypass = false; - rctx->alphatest_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); } /* Calculate the CS size. */ @@ -1250,7 +1250,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx, rctx->framebuffer.atom.num_dw += 2; } - rctx->framebuffer.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->framebuffer.atom); r600_set_sample_locations_constant_buffer(rctx); } @@ -1541,9 +1541,9 @@ static void r600_set_min_samples(struct pipe_context *ctx, unsigned min_samples) rctx->ps_iter_samples = min_samples; if (rctx->framebuffer.nr_samples > 1) { - rctx->rasterizer_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->rasterizer_state.atom); if (rctx->b.chip_class == R600) - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } @@ -2089,7 +2089,7 @@ bool r600_adjust_gprs(struct r600_context *rctx) if (rctx->config_state.sq_gpr_resource_mgmt_1 != tmp || rctx->config_state.sq_gpr_resource_mgmt_2 != tmp2) { rctx->config_state.sq_gpr_resource_mgmt_1 = tmp; rctx->config_state.sq_gpr_resource_mgmt_2 = tmp2; - rctx->config_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->config_state.atom); rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE; } return true; @@ -2796,7 +2796,7 @@ void r600_update_db_shader_control(struct r600_context * rctx) if (db_shader_control != rctx->db_misc_state.db_shader_control) { rctx->db_misc_state.db_shader_control = db_shader_control; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 455e59aef6c..2d654dc5eb7 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -127,11 +127,11 @@ static void r600_bind_blend_state_internal(struct r600_context *rctx, rctx->dual_src_blend = blend->dual_src_blend; if (!blend_disable) { - r600_set_cso_state_with_cb(&rctx->blend_state, blend, &blend->buffer); + r600_set_cso_state_with_cb(rctx, &rctx->blend_state, blend, &blend->buffer); color_control = blend->cb_color_control; } else { /* Blending is disabled. */ - r600_set_cso_state_with_cb(&rctx->blend_state, blend, &blend->buffer_no_blend); + r600_set_cso_state_with_cb(rctx, &rctx->blend_state, blend, &blend->buffer_no_blend); color_control = blend->cb_color_control_no_blend; } @@ -150,7 +150,7 @@ static void r600_bind_blend_state_internal(struct r600_context *rctx, update_cb = true; } if (update_cb) { - rctx->cb_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); } } @@ -160,7 +160,7 @@ static void r600_bind_blend_state(struct pipe_context *ctx, void *state) struct r600_blend_state *blend = (struct r600_blend_state *)state; if (blend == NULL) { - r600_set_cso_state_with_cb(&rctx->blend_state, NULL, NULL); + r600_set_cso_state_with_cb(rctx, &rctx->blend_state, NULL, NULL); return; } @@ -173,7 +173,7 @@ static void r600_set_blend_color(struct pipe_context *ctx, struct r600_context *rctx = (struct r600_context *)ctx; rctx->blend_color.state = *state; - rctx->blend_color.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->blend_color.atom); } void r600_emit_blend_color(struct r600_context *rctx, struct r600_atom *atom) @@ -210,7 +210,7 @@ static void r600_set_clip_state(struct pipe_context *ctx, struct pipe_constant_buffer cb; rctx->clip_state.state = *state; - rctx->clip_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->clip_state.atom); cb.buffer = NULL; cb.user_buffer = state->ucp; @@ -226,7 +226,7 @@ static void r600_set_stencil_ref(struct pipe_context *ctx, struct r600_context *rctx = (struct r600_context *)ctx; rctx->stencil_ref.state = *state; - rctx->stencil_ref.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->stencil_ref.atom); } void r600_emit_stencil_ref(struct r600_context *rctx, struct r600_atom *atom) @@ -274,11 +274,11 @@ static void r600_bind_dsa_state(struct pipe_context *ctx, void *state) struct r600_stencil_ref ref; if (state == NULL) { - r600_set_cso_state_with_cb(&rctx->dsa_state, NULL, NULL); + r600_set_cso_state_with_cb(rctx, &rctx->dsa_state, NULL, NULL); return; } - r600_set_cso_state_with_cb(&rctx->dsa_state, dsa, &dsa->buffer); + r600_set_cso_state_with_cb(rctx, &rctx->dsa_state, dsa, &dsa->buffer); ref.ref_value[0] = rctx->stencil_ref.pipe_state.ref_value[0]; ref.ref_value[1] = rctx->stencil_ref.pipe_state.ref_value[1]; @@ -293,7 +293,7 @@ static void r600_bind_dsa_state(struct pipe_context *ctx, void *state) * we are having lockup on evergreen so do not enable * hyperz when not writing zbuffer */ - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } @@ -304,7 +304,7 @@ static void r600_bind_dsa_state(struct pipe_context *ctx, void *state) rctx->alphatest_state.sx_alpha_ref != dsa->alpha_ref) { rctx->alphatest_state.sx_alpha_test_control = dsa->sx_alpha_test_control; rctx->alphatest_state.sx_alpha_ref = dsa->alpha_ref; - rctx->alphatest_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->alphatest_state.atom); } } @@ -318,14 +318,14 @@ static void r600_bind_rs_state(struct pipe_context *ctx, void *state) rctx->rasterizer = rs; - r600_set_cso_state_with_cb(&rctx->rasterizer_state, rs, &rs->buffer); + r600_set_cso_state_with_cb(rctx, &rctx->rasterizer_state, rs, &rs->buffer); if (rs->offset_enable && (rs->offset_units != rctx->poly_offset_state.offset_units || rs->offset_scale != rctx->poly_offset_state.offset_scale)) { rctx->poly_offset_state.offset_units = rs->offset_units; rctx->poly_offset_state.offset_scale = rs->offset_scale; - rctx->poly_offset_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->poly_offset_state.atom); } /* Update clip_misc_state. */ @@ -333,14 +333,14 @@ static void r600_bind_rs_state(struct pipe_context *ctx, void *state) rctx->clip_misc_state.clip_plane_enable != rs->clip_plane_enable) { rctx->clip_misc_state.pa_cl_clip_cntl = rs->pa_cl_clip_cntl; rctx->clip_misc_state.clip_plane_enable = rs->clip_plane_enable; - rctx->clip_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->clip_misc_state.atom); } /* Workaround for a missing scissor enable on r600. */ if (rctx->b.chip_class == R600 && rs->scissor_enable != rctx->scissor[0].enable) { rctx->scissor[0].enable = rs->scissor_enable; - rctx->scissor[0].atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->scissor[0].atom); } /* Re-emit PA_SC_LINE_STIPPLE. */ @@ -378,7 +378,7 @@ void r600_sampler_states_dirty(struct r600_context *rctx, state->atom.num_dw = util_bitcount(state->dirty_mask & state->has_bordercolor_mask) * 11 + util_bitcount(state->dirty_mask & ~state->has_bordercolor_mask) * 5; - state->atom.dirty = true; + r600_mark_atom_dirty(rctx, &state->atom); } } @@ -443,7 +443,7 @@ static void r600_bind_sampler_states(struct pipe_context *pipe, /* change in TA_CNTL_AUX need a pipeline flush */ rctx->b.flags |= R600_CONTEXT_WAIT_3D_IDLE; rctx->seamless_cube_map.enabled = seamless_cube_map; - rctx->seamless_cube_map.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->seamless_cube_map.atom); } } @@ -483,7 +483,7 @@ static void r600_bind_vertex_elements(struct pipe_context *ctx, void *state) { struct r600_context *rctx = (struct r600_context *)ctx; - r600_set_cso_state(&rctx->vertex_fetch_shader, state); + r600_set_cso_state(rctx, &rctx->vertex_fetch_shader, state); } static void r600_delete_vertex_elements(struct pipe_context *ctx, void *state) @@ -513,7 +513,7 @@ void r600_vertex_buffers_dirty(struct r600_context *rctx) rctx->b.flags |= R600_CONTEXT_INV_VERTEX_CACHE; rctx->vertex_buffer_state.atom.num_dw = (rctx->b.chip_class >= EVERGREEN ? 12 : 11) * util_bitcount(rctx->vertex_buffer_state.dirty_mask); - rctx->vertex_buffer_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->vertex_buffer_state.atom); } } @@ -570,7 +570,7 @@ void r600_sampler_views_dirty(struct r600_context *rctx, rctx->b.flags |= R600_CONTEXT_INV_TEX_CACHE; state->atom.num_dw = (rctx->b.chip_class >= EVERGREEN ? 14 : 13) * util_bitcount(state->dirty_mask); - state->atom.dirty = true; + r600_mark_atom_dirty(rctx, &state->atom); } } @@ -673,7 +673,7 @@ static void r600_set_viewport_states(struct pipe_context *ctx, for (i = start_slot; i < start_slot + num_viewports; i++) { rctx->viewport[i].state = state[i - start_slot]; - rctx->viewport[i].atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->viewport[i].atom); } } @@ -913,7 +913,7 @@ void r600_constant_buffers_dirty(struct r600_context *rctx, struct r600_constbuf rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE; state->atom.num_dw = rctx->b.chip_class >= EVERGREEN ? util_bitcount(state->dirty_mask)*20 : util_bitcount(state->dirty_mask)*19; - state->atom.dirty = true; + r600_mark_atom_dirty(rctx, &state->atom); } } @@ -982,7 +982,7 @@ static void r600_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask return; rctx->sample_mask.sample_mask = sample_mask; - rctx->sample_mask.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->sample_mask.atom); } /* @@ -1107,27 +1107,28 @@ static void update_shader_atom(struct pipe_context *ctx, struct r600_shader_state *state, struct r600_pipe_shader *shader) { + struct r600_context *rctx = (struct r600_context *)ctx; + state->shader = shader; if (shader) { state->atom.num_dw = shader->command_buffer.num_dw; - state->atom.dirty = true; r600_context_add_resource_size(ctx, (struct pipe_resource *)shader->bo); } else { state->atom.num_dw = 0; - state->atom.dirty = false; } + r600_mark_atom_dirty(rctx, &state->atom); } static void update_gs_block_state(struct r600_context *rctx, unsigned enable) { if (rctx->shader_stages.geom_enable != enable) { rctx->shader_stages.geom_enable = enable; - rctx->shader_stages.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->shader_stages.atom); } if (rctx->gs_rings.enable != enable) { rctx->gs_rings.enable = enable; - rctx->gs_rings.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->gs_rings.atom); if (enable && !rctx->gs_rings.esgs_ring.buffer) { unsigned size = 0x1C000; @@ -1192,7 +1193,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) if (!rctx->shader_stages.geom_enable) { rctx->shader_stages.geom_enable = true; - rctx->shader_stages.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->shader_stages.atom); } /* gs_shader provides GS and VS (copy shader) */ @@ -1206,7 +1207,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) rctx->clip_misc_state.pa_cl_vs_out_cntl = rctx->gs_shader->current->gs_copy_shader->pa_cl_vs_out_cntl; rctx->clip_misc_state.clip_dist_write = rctx->gs_shader->current->gs_copy_shader->shader.clip_dist_write; rctx->clip_misc_state.clip_disable = rctx->gs_shader->current->shader.vs_position_window_space; - rctx->clip_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->clip_misc_state.atom); } rctx->b.streamout.enabled_stream_buffers_mask = rctx->gs_shader->current->gs_copy_shader->enabled_stream_buffers_mask; } @@ -1224,7 +1225,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) update_shader_atom(ctx, &rctx->geometry_shader, NULL); update_shader_atom(ctx, &rctx->export_shader, NULL); rctx->shader_stages.geom_enable = false; - rctx->shader_stages.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->shader_stages.atom); } r600_shader_select(ctx, rctx->vs_shader, &vs_dirty); @@ -1241,7 +1242,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) rctx->clip_misc_state.pa_cl_vs_out_cntl = rctx->vs_shader->current->pa_cl_vs_out_cntl; rctx->clip_misc_state.clip_dist_write = rctx->vs_shader->current->shader.clip_dist_write; rctx->clip_misc_state.clip_disable = rctx->vs_shader->current->shader.vs_position_window_space; - rctx->clip_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->clip_misc_state.atom); } rctx->b.streamout.enabled_stream_buffers_mask = rctx->vs_shader->current->enabled_stream_buffers_mask; } @@ -1254,7 +1255,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) if (rctx->cb_misc_state.nr_ps_color_outputs != rctx->ps_shader->current->nr_ps_color_outputs) { rctx->cb_misc_state.nr_ps_color_outputs = rctx->ps_shader->current->nr_ps_color_outputs; - rctx->cb_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); } if (rctx->b.chip_class <= R700) { @@ -1262,7 +1263,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) if (rctx->cb_misc_state.multiwrite != multiwrite) { rctx->cb_misc_state.multiwrite = multiwrite; - rctx->cb_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); } } @@ -1276,7 +1277,7 @@ static bool r600_update_derived_state(struct r600_context *rctx) r600_update_ps_state(ctx, rctx->ps_shader->current); } - rctx->shader_stages.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->shader_stages.atom); update_shader_atom(ctx, &rctx->pixel_shader, rctx->ps_shader->current); } @@ -1455,13 +1456,13 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info rctx->vgt_state.vgt_multi_prim_ib_reset_en = info.primitive_restart; rctx->vgt_state.vgt_multi_prim_ib_reset_indx = info.restart_index; rctx->vgt_state.vgt_indx_offset = info.index_bias; - rctx->vgt_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->vgt_state.atom); } /* Workaround for hardware deadlock on certain R600 ASICs: write into a CB register. */ if (rctx->b.chip_class == R600) { rctx->b.flags |= R600_CONTEXT_PS_PARTIAL_FLUSH; - rctx->cb_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->cb_misc_state.atom); } /* Emit states. */ @@ -2491,7 +2492,7 @@ static void r600_set_occlusion_query_state(struct pipe_context *ctx, bool enable if (rctx->db_misc_state.occlusion_query_enabled != enable) { rctx->db_misc_state.occlusion_query_enabled = enable; - rctx->db_misc_state.atom.dirty = true; + r600_mark_atom_dirty(rctx, &rctx->db_misc_state.atom); } } -- cgit v1.2.3