From f80c03e1875fe96ff2f4c022e3cb76357828140d Mon Sep 17 00:00:00 2001 From: Christoph Bumiller Date: Mon, 28 Feb 2011 12:41:09 +0100 Subject: nv50: replace most of it with nvc0 driver ported to nv50 We'll have to do some unification now to reduce code duplication. --- src/gallium/drivers/nv50/nv50_surface.c | 568 +++++++++++++++++--------------- 1 file changed, 311 insertions(+), 257 deletions(-) (limited to 'src/gallium/drivers/nv50/nv50_surface.c') diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index a99df76cee3..b1f54f623ab 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -20,306 +20,360 @@ * SOFTWARE. */ -#define __NOUVEAU_PUSH_H__ #include -#include "nouveau/nv04_pushbuf.h" -#include "nv50_context.h" -#include "nv50_resource.h" + #include "pipe/p_defines.h" + #include "util/u_inlines.h" #include "util/u_pack_color.h" - #include "util/u_format.h" +#include "nv50_context.h" +#include "nv50_resource.h" + +#include "nv50_defs.xml.h" + /* return TRUE for formats that can be converted among each other by NV50_2D */ static INLINE boolean nv50_2d_format_faithful(enum pipe_format format) { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_B8G8R8A8_SRGB: - case PIPE_FORMAT_B8G8R8X8_SRGB: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_B5G5R5A1_UNORM: - case PIPE_FORMAT_B10G10R10A2_UNORM: - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - case PIPE_FORMAT_R32G32B32_FLOAT: - return TRUE; - default: - return FALSE; - } + switch (format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_B8G8R8A8_SRGB: + case PIPE_FORMAT_B8G8R8X8_SRGB: + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_B5G5R5A1_UNORM: + case PIPE_FORMAT_B10G10R10A2_UNORM: + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R32G32B32A32_FLOAT: + case PIPE_FORMAT_R32G32B32_FLOAT: + return TRUE; + default: + return FALSE; + } } static INLINE uint8_t nv50_2d_format(enum pipe_format format) { - uint8_t id = nv50_format_table[format].rt; - - /* Hardware values for color formats range from 0xc0 to 0xff, - * but the 2D engine doesn't support all of them. - */ - if ((id >= 0xc0) && (0xff0843e080608409ULL & (1ULL << (id - 0xc0)))) - return id; - - switch (util_format_get_blocksize(format)) { - case 1: - return NV50_2D_DST_FORMAT_R8_UNORM; - case 2: - return NV50_2D_DST_FORMAT_R16_UNORM; - case 4: - return NV50_2D_DST_FORMAT_A8R8G8B8_UNORM; - default: - return 0; - } + uint8_t id = nv50_format_table[format].rt; + + /* Hardware values for color formats range from 0xc0 to 0xff, + * but the 2D engine doesn't support all of them. + */ + if ((id >= 0xc0) && (0xff0843e080608409ULL & (1ULL << (id - 0xc0)))) + return id; + + switch (util_format_get_blocksize(format)) { + case 1: + return NV50_SURFACE_FORMAT_R8_UNORM; + case 2: + return NV50_SURFACE_FORMAT_R16_UNORM; + case 4: + return NV50_SURFACE_FORMAT_A8R8G8B8_UNORM; + default: + return 0; + } } static int -nv50_surface_set(struct nv50_screen *screen, struct pipe_surface *ps, int dst) +nv50_2d_texture_set(struct nouveau_channel *chan, int dst, + struct nv50_miptree *mt, unsigned level, unsigned layer) { - struct nv50_miptree *mt = nv50_miptree(ps->texture); - struct nouveau_channel *chan = screen->eng2d->channel; - struct nouveau_grobj *eng2d = screen->eng2d; - struct nouveau_bo *bo = nv50_miptree(ps->texture)->base.bo; - int format, mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; - int flags = NOUVEAU_BO_VRAM | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); - - format = nv50_2d_format(ps->format); - if (!format) { - NOUVEAU_ERR("invalid/unsupported surface format: %s\n", - util_format_name(ps->format)); - return 1; - } - - if (!nouveau_bo_tile_layout(bo)) { - BEGIN_RING(chan, eng2d, mthd, 2); - OUT_RING (chan, format); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, mthd + 0x14, 5); - OUT_RING (chan, mt->level[ps->u.tex.level].pitch); - OUT_RING (chan, ps->width); - OUT_RING (chan, ps->height); - OUT_RELOCh(chan, bo, ((struct nv50_surface *)ps)->offset, flags); - OUT_RELOCl(chan, bo, ((struct nv50_surface *)ps)->offset, flags); - } else { - BEGIN_RING(chan, eng2d, mthd, 5); - OUT_RING (chan, format); - OUT_RING (chan, 0); - OUT_RING (chan, mt->level[ps->u.tex.level].tile_mode << 4); - OUT_RING (chan, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, mthd + 0x18, 4); - OUT_RING (chan, ps->width); - OUT_RING (chan, ps->height); - OUT_RELOCh(chan, bo, ((struct nv50_surface *)ps)->offset, flags); - OUT_RELOCl(chan, bo, ((struct nv50_surface *)ps)->offset, flags); - } - + struct nouveau_bo *bo = mt->base.bo; + uint32_t width, height, depth; + uint32_t format; + uint32_t mthd = dst ? NV50_2D_DST_FORMAT : NV50_2D_SRC_FORMAT; + uint32_t flags = mt->base.domain | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); + uint32_t offset = mt->level[level].offset; + + format = nv50_2d_format(mt->base.base.format); + if (!format) { + NOUVEAU_ERR("invalid/unsupported surface format: %s\n", + util_format_name(mt->base.base.format)); + return 1; + } + + width = u_minify(mt->base.base.width0, level); + height = u_minify(mt->base.base.height0, level); + + offset = mt->level[level].offset; + if (!mt->layout_3d) { + offset += mt->layer_stride * layer; + depth = 1; + layer = 0; + } else { + depth = u_minify(mt->base.base.depth0, level); + } + + if (!(bo->tile_flags & NOUVEAU_BO_TILE_LAYOUT_MASK)) { + BEGIN_RING(chan, RING_2D_(mthd), 2); + OUT_RING (chan, format); + OUT_RING (chan, 1); + BEGIN_RING(chan, RING_2D_(mthd + 0x14), 5); + OUT_RING (chan, mt->level[level].pitch); + OUT_RING (chan, width); + OUT_RING (chan, height); + OUT_RELOCh(chan, bo, offset, flags); + OUT_RELOCl(chan, bo, offset, flags); + } else { + BEGIN_RING(chan, RING_2D_(mthd), 5); + OUT_RING (chan, format); + OUT_RING (chan, 0); + OUT_RING (chan, mt->level[level].tile_mode << 4); + OUT_RING (chan, depth); + OUT_RING (chan, layer); + BEGIN_RING(chan, RING_2D_(mthd + 0x18), 4); + OUT_RING (chan, width); + OUT_RING (chan, height); + OUT_RELOCh(chan, bo, offset, flags); + OUT_RELOCl(chan, bo, offset, flags); + } + #if 0 - if (dst) { - BEGIN_RING(chan, eng2d, NV50_2D_CLIP_X, 4); - OUT_RING (chan, 0); - OUT_RING (chan, 0); - OUT_RING (chan, surf->width); - OUT_RING (chan, surf->height); - } + if (dst) { + BEGIN_RING(chan, RING_2D_(NV50_2D_CLIP_X), 4); + OUT_RING (chan, 0); + OUT_RING (chan, 0); + OUT_RING (chan, width); + OUT_RING (chan, height); + } #endif - - return 0; + return 0; } -int -nv50_surface_do_copy(struct nv50_screen *screen, struct pipe_surface *dst, - int dx, int dy, struct pipe_surface *src, int sx, int sy, - int w, int h) +static int +nv50_2d_texture_do_copy(struct nouveau_channel *chan, + struct nv50_miptree *dst, unsigned dst_level, + unsigned dx, unsigned dy, unsigned dz, + struct nv50_miptree *src, unsigned src_level, + unsigned sx, unsigned sy, unsigned sz, + unsigned w, unsigned h) { - struct nouveau_channel *chan = screen->eng2d->channel; - struct nouveau_grobj *eng2d = screen->eng2d; - int ret; - - ret = MARK_RING(chan, 2*16 + 32, 4); - if (ret) - return ret; - - ret = nv50_surface_set(screen, dst, 1); - if (ret) - return ret; - - ret = nv50_surface_set(screen, src, 0); - if (ret) - return ret; - - BEGIN_RING(chan, eng2d, 0x088c, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, eng2d, NV50_2D_BLIT_DST_X, 4); - OUT_RING (chan, dx); - OUT_RING (chan, dy); - OUT_RING (chan, w); - OUT_RING (chan, h); - BEGIN_RING(chan, eng2d, 0x08c0, 4); - OUT_RING (chan, 0); - OUT_RING (chan, 1); - OUT_RING (chan, 0); - OUT_RING (chan, 1); - BEGIN_RING(chan, eng2d, 0x08d0, 4); - OUT_RING (chan, 0); - OUT_RING (chan, sx); - OUT_RING (chan, 0); - OUT_RING (chan, sy); - - return 0; + int ret; + + ret = MARK_RING(chan, 2 * 16 + 32, 4); + if (ret) + return ret; + + ret = nv50_2d_texture_set(chan, 1, dst, dst_level, dz); + if (ret) + return ret; + + ret = nv50_2d_texture_set(chan, 0, src, src_level, sz); + if (ret) + return ret; + + /* 0/1 = CENTER/CORNER, 10/00 = POINT/BILINEAR */ + BEGIN_RING(chan, RING_2D(BLIT_CONTROL), 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, RING_2D(BLIT_DST_X), 4); + OUT_RING (chan, dx); + OUT_RING (chan, dy); + OUT_RING (chan, w); + OUT_RING (chan, h); + BEGIN_RING(chan, RING_2D(BLIT_DU_DX_FRACT), 4); + OUT_RING (chan, 0); + OUT_RING (chan, 1); + OUT_RING (chan, 0); + OUT_RING (chan, 1); + BEGIN_RING(chan, RING_2D(BLIT_SRC_X_FRACT), 4); + OUT_RING (chan, 0); + OUT_RING (chan, sx); + OUT_RING (chan, 0); + OUT_RING (chan, sy); + + return 0; } static void -nv50_surface_copy(struct pipe_context *pipe, - struct pipe_resource *dest, unsigned dst_level, - unsigned destx, unsigned desty, unsigned destz, - struct pipe_resource *src, unsigned src_level, - const struct pipe_box *src_box) +nv50_resource_copy_region(struct pipe_context *pipe, + struct pipe_resource *dst, unsigned dst_level, + unsigned dstx, unsigned dsty, unsigned dstz, + struct pipe_resource *src, unsigned src_level, + const struct pipe_box *src_box) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nv50_screen *screen = nv50->screen; - struct pipe_surface *ps_dst, *ps_src, surf_tmpl; - - - assert((src->format == dest->format) || - (nv50_2d_format_faithful(src->format) && - nv50_2d_format_faithful(dest->format))); - assert(src_box->depth == 1); - - memset(&surf_tmpl, 0, sizeof(surf_tmpl)); - surf_tmpl.format = src->format; - surf_tmpl.usage = 0; /* no bind flag - not a surface */ - surf_tmpl.u.tex.level = src_level; - surf_tmpl.u.tex.first_layer = src_box->z; - surf_tmpl.u.tex.last_layer = src_box->z; - /* XXX really need surfaces here? */ - ps_src = nv50_miptree_surface_new(pipe, src, &surf_tmpl); - surf_tmpl.format = dest->format; - surf_tmpl.usage = 0; /* no bind flag - not a surface */ - surf_tmpl.u.tex.level = dst_level; - surf_tmpl.u.tex.first_layer = destz; - surf_tmpl.u.tex.last_layer = destz; - ps_dst = nv50_miptree_surface_new(pipe, dest, &surf_tmpl); - - nv50_surface_do_copy(screen, ps_dst, destx, desty, ps_src, src_box->x, - src_box->y, src_box->width, src_box->height); - - nv50_miptree_surface_del(pipe, ps_src); - nv50_miptree_surface_del(pipe, ps_dst); + struct nv50_screen *screen = nv50_context(pipe)->screen; + int ret; + unsigned dst_layer = dstz, src_layer = src_box->z; + + assert((src->format == dst->format) || + (nv50_2d_format_faithful(src->format) && + nv50_2d_format_faithful(dst->format))); + + for (; dst_layer < dstz + src_box->depth; ++dst_layer, ++src_layer) { + ret = nv50_2d_texture_do_copy(screen->base.channel, + nv50_miptree(dst), dst_level, + dstx, dsty, dst_layer, + nv50_miptree(src), src_level, + src_box->x, src_box->y, src_layer, + src_box->width, src_box->height); + if (ret) + return; + } } static void nv50_clear_render_target(struct pipe_context *pipe, - struct pipe_surface *dst, - const float *rgba, - unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + struct pipe_surface *dst, + const float *rgba, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nv50_screen *screen = nv50->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *tesla = screen->tesla; - struct nv50_miptree *mt = nv50_miptree(dst->texture); - struct nouveau_bo *bo = mt->base.bo; - - BEGIN_RING(chan, tesla, NV50TCL_CLEAR_COLOR(0), 4); - OUT_RINGf (chan, rgba[0]); - OUT_RINGf (chan, rgba[1]); - OUT_RINGf (chan, rgba[2]); - OUT_RINGf (chan, rgba[3]); - - if (MARK_RING(chan, 18, 2)) - return; - - BEGIN_RING(chan, tesla, NV50TCL_RT_CONTROL, 1); - OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50TCL_RT_ADDRESS_HIGH(0), 5); - OUT_RELOCh(chan, bo, ((struct nv50_surface *)dst)->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCl(chan, bo, ((struct nv50_surface *)dst)->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RING (chan, nv50_format_table[dst->format].rt); - OUT_RING (chan, mt->level[dst->u.tex.level].tile_mode << 4); - OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50TCL_RT_HORIZ(0), 2); - OUT_RING (chan, dst->width); - OUT_RING (chan, dst->height); - BEGIN_RING(chan, tesla, NV50TCL_RT_ARRAY_MODE, 1); - OUT_RING (chan, 1); - - /* NOTE: only works with D3D clear flag (5097/0x143c bit 4) */ - - BEGIN_RING(chan, tesla, NV50TCL_VIEWPORT_HORIZ(0), 2); - OUT_RING (chan, (width << 16) | dstx); - OUT_RING (chan, (height << 16) | dsty); - - BEGIN_RING(chan, tesla, NV50TCL_CLEAR_BUFFERS, 1); - OUT_RING (chan, 0x3c); - - nv50->dirty |= NV50_NEW_FRAMEBUFFER; + struct nv50_context *nv50 = nv50_context(pipe); + struct nv50_screen *screen = nv50->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nv50_miptree *mt = nv50_miptree(dst->texture); + struct nv50_surface *sf = nv50_surface(dst); + struct nouveau_bo *bo = mt->base.bo; + + BEGIN_RING(chan, RING_3D(CLEAR_COLOR(0)), 4); + OUT_RINGf (chan, rgba[0]); + OUT_RINGf (chan, rgba[1]); + OUT_RINGf (chan, rgba[2]); + OUT_RINGf (chan, rgba[3]); + + if (MARK_RING(chan, 18, 2)) + return; + + BEGIN_RING(chan, RING_3D(RT_CONTROL), 1); + OUT_RING (chan, 1); + BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(0)), 5); + OUT_RELOCh(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCl(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RING (chan, nv50_format_table[dst->format].rt); + OUT_RING (chan, mt->level[sf->base.u.tex.level].tile_mode << 4); + OUT_RING (chan, 0); + BEGIN_RING(chan, RING_3D(RT_HORIZ(0)), 2); + OUT_RING (chan, sf->width); + OUT_RING (chan, sf->height); + BEGIN_RING(chan, RING_3D(RT_ARRAY_MODE), 1); + OUT_RING (chan, 1); + + /* NOTE: only works with D3D clear flag (5097/0x143c bit 4) */ + + BEGIN_RING(chan, RING_3D(VIEWPORT_HORIZ(0)), 2); + OUT_RING (chan, (width << 16) | dstx); + OUT_RING (chan, (height << 16) | dsty); + + BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1); + OUT_RING (chan, 0x3c); + + nv50->dirty |= NV50_NEW_FRAMEBUFFER; } static void nv50_clear_depth_stencil(struct pipe_context *pipe, - struct pipe_surface *dst, - unsigned clear_flags, - double depth, - unsigned stencil, - unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + struct pipe_surface *dst, + unsigned clear_flags, + double depth, + unsigned stencil, + unsigned dstx, unsigned dsty, + unsigned width, unsigned height) +{ + struct nv50_context *nv50 = nv50_context(pipe); + struct nv50_screen *screen = nv50->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nv50_miptree *mt = nv50_miptree(dst->texture); + struct nv50_surface *sf = nv50_surface(dst); + struct nouveau_bo *bo = mt->base.bo; + uint32_t mode = 0; + + if (clear_flags & PIPE_CLEAR_DEPTH) { + BEGIN_RING(chan, RING_3D(CLEAR_DEPTH), 1); + OUT_RINGf (chan, depth); + mode |= NV50_3D_CLEAR_BUFFERS_Z; + } + + if (clear_flags & PIPE_CLEAR_STENCIL) { + BEGIN_RING(chan, RING_3D(CLEAR_STENCIL), 1); + OUT_RING (chan, stencil & 0xff); + mode |= NV50_3D_CLEAR_BUFFERS_S; + } + + if (MARK_RING(chan, 17, 2)) + return; + + BEGIN_RING(chan, RING_3D(ZETA_ADDRESS_HIGH), 5); + OUT_RELOCh(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RELOCl(chan, bo, sf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + OUT_RING (chan, nv50_format_table[dst->format].rt); + OUT_RING (chan, mt->level[sf->base.u.tex.level].tile_mode << 4); + OUT_RING (chan, 0); + BEGIN_RING(chan, RING_3D(ZETA_ENABLE), 1); + OUT_RING (chan, 1); + BEGIN_RING(chan, RING_3D(ZETA_HORIZ), 3); + OUT_RING (chan, sf->width); + OUT_RING (chan, sf->height); + OUT_RING (chan, (1 << 16) | 1); + + BEGIN_RING(chan, RING_3D(VIEWPORT_HORIZ(0)), 2); + OUT_RING (chan, (width << 16) | dstx); + OUT_RING (chan, (height << 16) | dsty); + + BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1); + OUT_RING (chan, mode); + + nv50->dirty |= NV50_NEW_FRAMEBUFFER; +} + +void +nv50_clear(struct pipe_context *pipe, unsigned buffers, + const float *rgba, double depth, unsigned stencil) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nv50_screen *screen = nv50->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *tesla = screen->tesla; - struct nv50_miptree *mt = nv50_miptree(dst->texture); - struct nouveau_bo *bo = mt->base.bo; - uint32_t mode = 0; - - if (clear_flags & PIPE_CLEAR_DEPTH) { - BEGIN_RING(chan, tesla, NV50TCL_CLEAR_DEPTH, 1); - OUT_RINGf (chan, depth); - mode |= NV50TCL_CLEAR_BUFFERS_Z; - } - - if (clear_flags & PIPE_CLEAR_STENCIL) { - BEGIN_RING(chan, tesla, NV50TCL_CLEAR_STENCIL, 1); - OUT_RING (chan, stencil & 0xff); - mode |= NV50TCL_CLEAR_BUFFERS_S; - } - - if (MARK_RING(chan, 17, 2)) - return; - - BEGIN_RING(chan, tesla, NV50TCL_ZETA_ADDRESS_HIGH, 5); - OUT_RELOCh(chan, bo, ((struct nv50_surface *)dst)->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RELOCl(chan, bo, ((struct nv50_surface *)dst)->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); - OUT_RING (chan, nv50_format_table[dst->format].rt); - OUT_RING (chan, mt->level[dst->u.tex.level].tile_mode << 4); - OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, NV50TCL_ZETA_ENABLE, 1); - OUT_RING (chan, 1); - BEGIN_RING(chan, tesla, NV50TCL_ZETA_HORIZ, 3); - OUT_RING (chan, dst->width); - OUT_RING (chan, dst->height); - OUT_RING (chan, (1 << 16) | 1); - - BEGIN_RING(chan, tesla, NV50TCL_VIEWPORT_HORIZ(0), 2); - OUT_RING (chan, (width << 16) | dstx); - OUT_RING (chan, (height << 16) | dsty); - - BEGIN_RING(chan, tesla, NV50TCL_CLEAR_BUFFERS, 1); - OUT_RING (chan, mode); - - nv50->dirty |= NV50_NEW_FRAMEBUFFER; + struct nv50_context *nv50 = nv50_context(pipe); + struct nouveau_channel *chan = nv50->screen->base.channel; + struct pipe_framebuffer_state *fb = &nv50->framebuffer; + unsigned i; + const unsigned dirty = nv50->dirty; + uint32_t mode = 0; + + /* don't need NEW_BLEND, COLOR_MASK doesn't affect CLEAR_BUFFERS */ + nv50->dirty &= NV50_NEW_FRAMEBUFFER; + if (!nv50_state_validate(nv50)) + return; + + if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) { + BEGIN_RING(chan, RING_3D(CLEAR_COLOR(0)), 4); + OUT_RINGf (chan, rgba[0]); + OUT_RINGf (chan, rgba[1]); + OUT_RINGf (chan, rgba[2]); + OUT_RINGf (chan, rgba[3]); + mode = + NV50_3D_CLEAR_BUFFERS_R | NV50_3D_CLEAR_BUFFERS_G | + NV50_3D_CLEAR_BUFFERS_B | NV50_3D_CLEAR_BUFFERS_A; + } + + if (buffers & PIPE_CLEAR_DEPTH) { + BEGIN_RING(chan, RING_3D(CLEAR_DEPTH), 1); + OUT_RING (chan, fui(depth)); + mode |= NV50_3D_CLEAR_BUFFERS_Z; + } + + if (buffers & PIPE_CLEAR_STENCIL) { + BEGIN_RING(chan, RING_3D(CLEAR_STENCIL), 1); + OUT_RING (chan, stencil & 0xff); + mode |= NV50_3D_CLEAR_BUFFERS_S; + } + + BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1); + OUT_RING (chan, mode); + + for (i = 1; i < fb->nr_cbufs; i++) { + BEGIN_RING(chan, RING_3D(CLEAR_BUFFERS), 1); + OUT_RING (chan, (i << 6) | 0x3c); + } + + nv50->dirty = dirty & ~NV50_NEW_FRAMEBUFFER; } void nv50_init_surface_functions(struct nv50_context *nv50) { - nv50->pipe.resource_copy_region = nv50_surface_copy; - nv50->pipe.clear_render_target = nv50_clear_render_target; - nv50->pipe.clear_depth_stencil = nv50_clear_depth_stencil; + nv50->pipe.resource_copy_region = nv50_resource_copy_region; + nv50->pipe.clear_render_target = nv50_clear_render_target; + nv50->pipe.clear_depth_stencil = nv50_clear_depth_stencil; } -- cgit v1.2.3 From 1ba8e9510812f155359d380bda6876cdee5ba21e Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Tue, 1 Mar 2011 15:28:26 +1000 Subject: nouveau: ensure vbo_dirty is set when buffer write transfer complete This introduces a shared nouveau_context struct to track such things. Signed-off-by: Ben Skeggs --- src/gallium/drivers/nouveau/nouveau_buffer.c | 47 +++++------ src/gallium/drivers/nouveau/nouveau_buffer.h | 9 +- src/gallium/drivers/nouveau/nouveau_context.h | 26 ++++++ src/gallium/drivers/nouveau/nouveau_screen.h | 7 -- src/gallium/drivers/nv50/nv50_context.c | 26 +++--- src/gallium/drivers/nv50/nv50_context.h | 8 +- src/gallium/drivers/nv50/nv50_push.c | 4 +- src/gallium/drivers/nv50/nv50_query.c | 14 ++-- src/gallium/drivers/nv50/nv50_screen.c | 2 - src/gallium/drivers/nv50/nv50_shader_state.c | 4 +- src/gallium/drivers/nv50/nv50_state.c | 100 +++++++++++----------- src/gallium/drivers/nv50/nv50_surface.c | 8 +- src/gallium/drivers/nv50/nv50_tex.c | 2 +- src/gallium/drivers/nv50/nv50_transfer.c | 10 +-- src/gallium/drivers/nv50/nv50_vbo.c | 18 ++-- src/gallium/drivers/nvc0/nvc0_context.c | 26 +++--- src/gallium/drivers/nvc0/nvc0_context.h | 9 +- src/gallium/drivers/nvc0/nvc0_push.c | 4 +- src/gallium/drivers/nvc0/nvc0_query.c | 14 ++-- src/gallium/drivers/nvc0/nvc0_screen.c | 2 - src/gallium/drivers/nvc0/nvc0_shader_state.c | 4 +- src/gallium/drivers/nvc0/nvc0_state.c | 116 +++++++++++++------------- src/gallium/drivers/nvc0/nvc0_surface.c | 8 +- src/gallium/drivers/nvc0/nvc0_tex.c | 2 +- src/gallium/drivers/nvc0/nvc0_transfer.c | 10 +-- src/gallium/drivers/nvc0/nvc0_vbo.c | 18 ++-- 26 files changed, 267 insertions(+), 231 deletions(-) create mode 100644 src/gallium/drivers/nouveau/nouveau_context.h (limited to 'src/gallium/drivers/nv50/nv50_surface.c') diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c index efb16824e46..571fa0c608b 100644 --- a/src/gallium/drivers/nouveau/nouveau_buffer.c +++ b/src/gallium/drivers/nouveau/nouveau_buffer.c @@ -4,6 +4,7 @@ #include "util/u_math.h" #include "nouveau_screen.h" +#include "nouveau_context.h" #include "nouveau_winsys.h" #include "nouveau_fence.h" #include "nouveau_buffer.h" @@ -90,22 +91,21 @@ nouveau_buffer_destroy(struct pipe_screen *pscreen, /* Maybe just migrate to GART right away if we actually need to do this. */ boolean -nouveau_buffer_download(struct pipe_context *pipe, struct nv04_resource *buf, +nouveau_buffer_download(struct nouveau_context *nv, struct nv04_resource *buf, unsigned start, unsigned size) { - struct nouveau_screen *screen = nouveau_screen(pipe->screen); struct nouveau_mm_allocation *mm; struct nouveau_bo *bounce = NULL; uint32_t offset; assert(buf->domain == NOUVEAU_BO_VRAM); - mm = nouveau_mm_allocate(screen->mm_GART, size, &bounce, &offset); + mm = nouveau_mm_allocate(nv->screen->mm_GART, size, &bounce, &offset); if (!bounce) return FALSE; - screen->copy_data(pipe, bounce, offset, NOUVEAU_BO_GART, - buf->bo, buf->offset + start, NOUVEAU_BO_VRAM, size); + nv->copy_data(nv, bounce, offset, NOUVEAU_BO_GART, + buf->bo, buf->offset + start, NOUVEAU_BO_VRAM, size); if (nouveau_bo_map_range(bounce, offset, size, NOUVEAU_BO_RD)) return FALSE; @@ -121,21 +121,20 @@ nouveau_buffer_download(struct pipe_context *pipe, struct nv04_resource *buf, } static boolean -nouveau_buffer_upload(struct pipe_context *pipe, struct nv04_resource *buf, +nouveau_buffer_upload(struct nouveau_context *nv, struct nv04_resource *buf, unsigned start, unsigned size) { - struct nouveau_screen *screen = nouveau_screen(pipe->screen); struct nouveau_mm_allocation *mm; struct nouveau_bo *bounce = NULL; uint32_t offset; if (size <= 192) { - screen->push_data(pipe, buf->bo, buf->offset + start, buf->domain, - size, buf->data + start); + nv->push_data(nv, buf->bo, buf->offset + start, buf->domain, + size, buf->data + start); return TRUE; } - mm = nouveau_mm_allocate(screen->mm_GART, size, &bounce, &offset); + mm = nouveau_mm_allocate(nv->screen->mm_GART, size, &bounce, &offset); if (!bounce) return FALSE; @@ -144,12 +143,12 @@ nouveau_buffer_upload(struct pipe_context *pipe, struct nv04_resource *buf, memcpy(bounce->map, buf->data + start, size); nouveau_bo_unmap(bounce); - screen->copy_data(pipe, buf->bo, buf->offset + start, NOUVEAU_BO_VRAM, - bounce, offset, NOUVEAU_BO_GART, size); + nv->copy_data(nv, buf->bo, buf->offset + start, NOUVEAU_BO_VRAM, + bounce, offset, NOUVEAU_BO_GART, size); nouveau_bo_ref(NULL, &bounce); if (mm) - release_allocation(&mm, screen->fence.current); + release_allocation(&mm, nv->screen->fence.current); if (start == 0 && size == buf->base.width0) buf->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING; @@ -163,6 +162,7 @@ nouveau_buffer_transfer_get(struct pipe_context *pipe, const struct pipe_box *box) { struct nv04_resource *buf = nv04_resource(resource); + struct nouveau_context *nv = nouveau_context(pipe); struct nouveau_transfer *xfr = CALLOC_STRUCT(nouveau_transfer); if (!xfr) return NULL; @@ -175,7 +175,7 @@ nouveau_buffer_transfer_get(struct pipe_context *pipe, if (buf->domain == NOUVEAU_BO_VRAM) { if (usage & PIPE_TRANSFER_READ) { if (buf->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) - nouveau_buffer_download(pipe, buf, 0, buf->base.width0); + nouveau_buffer_download(nv, buf, 0, buf->base.width0); } } @@ -188,20 +188,19 @@ nouveau_buffer_transfer_destroy(struct pipe_context *pipe, { struct nv04_resource *buf = nv04_resource(transfer->resource); struct nouveau_transfer *xfr = nouveau_transfer(transfer); + struct nouveau_context *nv = nouveau_context(pipe); if (xfr->base.usage & PIPE_TRANSFER_WRITE) { /* writing is worse */ - nouveau_buffer_adjust_score(pipe, buf, -5000); + nouveau_buffer_adjust_score(nv, buf, -5000); if (buf->domain == NOUVEAU_BO_VRAM) { - nouveau_buffer_upload(pipe, buf, transfer->box.x, transfer->box.width); + nouveau_buffer_upload(nv, buf, transfer->box.x, transfer->box.width); } -#if 0 if (buf->domain != 0 && (buf->base.bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER))) nouveau_context(pipe)->vbo_dirty = TRUE; -#endif } FREE(xfr); @@ -249,7 +248,7 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe, uint32_t offset = xfr->base.box.x; uint32_t flags; - nouveau_buffer_adjust_score(pipe, buf, -250); + nouveau_buffer_adjust_score(nouveau_context(pipe), buf, -250); if (buf->domain != NOUVEAU_BO_GART) return buf->data + offset; @@ -403,10 +402,10 @@ nouveau_buffer_data_fetch(struct nv04_resource *buf, struct nouveau_bo *bo, /* Migrate a linear buffer (vertex, index, constants) USER -> GART -> VRAM. */ boolean -nouveau_buffer_migrate(struct pipe_context *pipe, +nouveau_buffer_migrate(struct nouveau_context *nv, struct nv04_resource *buf, const unsigned new_domain) { - struct nouveau_screen *screen = nouveau_screen(pipe->screen); + struct nouveau_screen *screen = nv->screen; struct nouveau_bo *bo; const unsigned old_domain = buf->domain; unsigned size = buf->base.width0; @@ -442,8 +441,8 @@ nouveau_buffer_migrate(struct pipe_context *pipe, buf->mm = NULL; nouveau_buffer_allocate(screen, buf, new_domain); - screen->copy_data(pipe, buf->bo, buf->offset, new_domain, - bo, offset, old_domain, buf->base.width0); + nv->copy_data(nv, buf->bo, buf->offset, new_domain, + bo, offset, old_domain, buf->base.width0); nouveau_bo_ref(NULL, &bo); if (mm) @@ -452,7 +451,7 @@ nouveau_buffer_migrate(struct pipe_context *pipe, if (new_domain == NOUVEAU_BO_VRAM && old_domain == 0) { if (!nouveau_buffer_allocate(screen, buf, NOUVEAU_BO_VRAM)) return FALSE; - if (!nouveau_buffer_upload(pipe, buf, 0, buf->base.width0)) + if (!nouveau_buffer_upload(nv, buf, 0, buf->base.width0)) return FALSE; } else return FALSE; diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.h b/src/gallium/drivers/nouveau/nouveau_buffer.h index c3e0c2cf924..46e3554bdf7 100644 --- a/src/gallium/drivers/nouveau/nouveau_buffer.h +++ b/src/gallium/drivers/nouveau/nouveau_buffer.h @@ -5,6 +5,7 @@ #include "util/u_double_list.h" struct pipe_resource; +struct nouveau_context; struct nouveau_bo; #define NOUVEAU_BUFFER_SCORE_MIN -25000 @@ -50,15 +51,15 @@ void nouveau_buffer_release_gpu_storage(struct nv04_resource *); boolean -nouveau_buffer_download(struct pipe_context *, struct nv04_resource *, +nouveau_buffer_download(struct nouveau_context *, struct nv04_resource *, unsigned start, unsigned size); boolean -nouveau_buffer_migrate(struct pipe_context *, +nouveau_buffer_migrate(struct nouveau_context *, struct nv04_resource *, unsigned domain); static INLINE void -nouveau_buffer_adjust_score(struct pipe_context *pipe, +nouveau_buffer_adjust_score(struct nouveau_context *pipe, struct nv04_resource *res, int16_t score) { if (score < 0) { @@ -76,7 +77,7 @@ nouveau_buffer_adjust_score(struct pipe_context *pipe, /* XXX: wait for fence (atm only using this for vertex push) */ static INLINE void * -nouveau_resource_map_offset(struct pipe_context *pipe, +nouveau_resource_map_offset(struct nouveau_context *pipe, struct nv04_resource *res, uint32_t offset, uint32_t flags) { diff --git a/src/gallium/drivers/nouveau/nouveau_context.h b/src/gallium/drivers/nouveau/nouveau_context.h new file mode 100644 index 00000000000..696e0d3f24e --- /dev/null +++ b/src/gallium/drivers/nouveau/nouveau_context.h @@ -0,0 +1,26 @@ +#ifndef __NOUVEAU_CONTEXT_H__ +#define __NOUVEAU_CONTEXT_H__ + +#include "pipe/p_context.h" + +struct nouveau_context { + struct pipe_context pipe; + struct nouveau_screen *screen; + + boolean vbo_dirty; + + void (*copy_data)(struct nouveau_context *, + struct nouveau_bo *dst, unsigned, unsigned, + struct nouveau_bo *src, unsigned, unsigned, unsigned); + void (*push_data)(struct nouveau_context *, + struct nouveau_bo *dst, unsigned, unsigned, + unsigned, void *); +}; + +static INLINE struct nouveau_context * +nouveau_context(struct pipe_context *pipe) +{ + return (struct nouveau_context *)pipe; +} + +#endif diff --git a/src/gallium/drivers/nouveau/nouveau_screen.h b/src/gallium/drivers/nouveau/nouveau_screen.h index c64b7b16ad2..580b4da6b4e 100644 --- a/src/gallium/drivers/nouveau/nouveau_screen.h +++ b/src/gallium/drivers/nouveau/nouveau_screen.h @@ -29,13 +29,6 @@ struct nouveau_screen { struct nouveau_mman *mm_VRAM; struct nouveau_mman *mm_GART; - void (*copy_data)(struct pipe_context *, - struct nouveau_bo *dst, unsigned, unsigned, - struct nouveau_bo *src, unsigned, unsigned, - unsigned); - void (*push_data)(struct pipe_context *, - struct nouveau_bo *dst, unsigned, unsigned, - unsigned, void *); }; static INLINE struct nouveau_screen * diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c index 03a5c3d2d91..912367b8391 100644 --- a/src/gallium/drivers/nv50/nv50_context.c +++ b/src/gallium/drivers/nv50/nv50_context.c @@ -84,22 +84,28 @@ nv50_create(struct pipe_screen *pscreen, void *priv) struct pipe_winsys *pipe_winsys = pscreen->winsys; struct nv50_screen *screen = nv50_screen(pscreen); struct nv50_context *nv50; + struct pipe_context *pipe; nv50 = CALLOC_STRUCT(nv50_context); if (!nv50) return NULL; + pipe = &nv50->base.pipe; + nv50->screen = screen; + nv50->base.screen = &screen->base; + nv50->base.copy_data = nv50_m2mf_copy_linear; + nv50->base.push_data = nv50_sifc_linear_u8; - nv50->pipe.winsys = pipe_winsys; - nv50->pipe.screen = pscreen; - nv50->pipe.priv = priv; + pipe->winsys = pipe_winsys; + pipe->screen = pscreen; + pipe->priv = priv; - nv50->pipe.destroy = nv50_destroy; + pipe->destroy = nv50_destroy; - nv50->pipe.draw_vbo = nv50_draw_vbo; - nv50->pipe.clear = nv50_clear; + pipe->draw_vbo = nv50_draw_vbo; + pipe->clear = nv50_clear; - nv50->pipe.flush = nv50_flush; + pipe->flush = nv50_flush; if (!screen->cur_ctx) screen->cur_ctx = nv50; @@ -109,13 +115,13 @@ nv50_create(struct pipe_screen *pscreen, void *priv) nv50_init_query_functions(nv50); nv50_init_surface_functions(nv50); nv50_init_state_functions(nv50); - nv50_init_resource_functions(&nv50->pipe); + nv50_init_resource_functions(pipe); - nv50->draw = draw_create(&nv50->pipe); + nv50->draw = draw_create(pipe); assert(nv50->draw); draw_set_rasterize_stage(nv50->draw, nv50_draw_render_stage(nv50)); - return &nv50->pipe; + return pipe; } struct resident { diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h index 55d996da27f..e6079a621a9 100644 --- a/src/gallium/drivers/nv50/nv50_context.h +++ b/src/gallium/drivers/nv50/nv50_context.h @@ -19,6 +19,7 @@ #include "nv50_program.h" #include "nv50_resource.h" +#include "nouveau/nouveau_context.h" #include "nouveau/nv_object.xml.h" #include "nouveau/nv_m2mf.xml.h" #include "nv50_3ddefs.xml.h" @@ -67,7 +68,7 @@ #define NV50_CB_AUX 127 struct nv50_context { - struct pipe_context pipe; + struct nouveau_context base; struct nv50_screen *screen; @@ -122,7 +123,6 @@ struct nv50_context { unsigned sample_mask; - boolean vbo_dirty; boolean vbo_push_hint; struct draw_context *draw; @@ -204,11 +204,11 @@ nv50_create_sampler_view(struct pipe_context *, /* nv50_transfer.c */ void -nv50_sifc_linear_u8(struct pipe_context *pipe, +nv50_sifc_linear_u8(struct nouveau_context *pipe, struct nouveau_bo *dst, unsigned offset, unsigned domain, unsigned size, void *data); void -nv50_m2mf_copy_linear(struct pipe_context *pipe, +nv50_m2mf_copy_linear(struct nouveau_context *pipe, struct nouveau_bo *dst, unsigned dstoff, unsigned dstdom, struct nouveau_bo *src, unsigned srcoff, unsigned srcdom, unsigned size); diff --git a/src/gallium/drivers/nv50/nv50_push.c b/src/gallium/drivers/nv50/nv50_push.c index 07034bdcf62..71b5995a4f8 100644 --- a/src/gallium/drivers/nv50/nv50_push.c +++ b/src/gallium/drivers/nv50/nv50_push.c @@ -229,7 +229,7 @@ nv50_push_vbo(struct nv50_context *nv50, const struct pipe_draw_info *info) struct pipe_vertex_buffer *vb = &nv50->vtxbuf[i]; struct nv04_resource *res = nv04_resource(vb->buffer); - data = nouveau_resource_map_offset(&nv50->pipe, res, + data = nouveau_resource_map_offset(&nv50->base, res, vb->buffer_offset, NOUVEAU_BO_RD); if (apply_bias && likely(!(nv50->vertex->instance_bufs & (1 << i)))) @@ -239,7 +239,7 @@ nv50_push_vbo(struct nv50_context *nv50, const struct pipe_draw_info *info) } if (info->indexed) { - ctx.idxbuf = nouveau_resource_map_offset(&nv50->pipe, + ctx.idxbuf = nouveau_resource_map_offset(&nv50->base, nv04_resource(nv50->idxbuf.buffer), nv50->idxbuf.offset, NOUVEAU_BO_RD); if (!ctx.idxbuf) diff --git a/src/gallium/drivers/nv50/nv50_query.c b/src/gallium/drivers/nv50/nv50_query.c index 2e65c54e548..2dce94a4775 100644 --- a/src/gallium/drivers/nv50/nv50_query.c +++ b/src/gallium/drivers/nv50/nv50_query.c @@ -326,10 +326,12 @@ nv50_render_condition(struct pipe_context *pipe, void nv50_init_query_functions(struct nv50_context *nv50) { - nv50->pipe.create_query = nv50_query_create; - nv50->pipe.destroy_query = nv50_query_destroy; - nv50->pipe.begin_query = nv50_query_begin; - nv50->pipe.end_query = nv50_query_end; - nv50->pipe.get_query_result = nv50_query_result; - nv50->pipe.render_condition = nv50_render_condition; + struct pipe_context *pipe = &nv50->base.pipe; + + pipe->create_query = nv50_query_create; + pipe->destroy_query = nv50_query_destroy; + pipe->begin_query = nv50_query_begin; + pipe->end_query = nv50_query_end; + pipe->get_query_result = nv50_query_result; + pipe->render_condition = nv50_render_condition; } diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index 13c03b1a7e6..f2b03e8156e 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -310,8 +310,6 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) screen->base.vertex_buffer_flags = screen->base.index_buffer_flags = NOUVEAU_BO_GART; - screen->base.copy_data = nv50_m2mf_copy_linear; - screen->base.push_data = nv50_sifc_linear_u8; ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096, &screen->fence.bo); diff --git a/src/gallium/drivers/nv50/nv50_shader_state.c b/src/gallium/drivers/nv50/nv50_shader_state.c index 2d7572820f2..7d4b12bde17 100644 --- a/src/gallium/drivers/nv50/nv50_shader_state.c +++ b/src/gallium/drivers/nv50/nv50_shader_state.c @@ -76,7 +76,7 @@ nv50_constbufs_validate(struct nv50_context *nv50) assert(0); if (!nouveau_resource_mapped_by_gpu(&res->base)) { - nouveau_buffer_migrate(&nv50->pipe, res, NOUVEAU_BO_VRAM); + nouveau_buffer_migrate(&nv50->base, res, NOUVEAU_BO_VRAM); BEGIN_RING(chan, RING_3D(CODE_CB_FLUSH), 1); OUT_RING (chan, 0); @@ -149,7 +149,7 @@ nv50_program_validate(struct nv50_context *nv50, struct nv50_program *prog) return FALSE; prog->code_base = prog->res->start; - nv50_sifc_linear_u8(&nv50->pipe, nv50->screen->code, + nv50_sifc_linear_u8(&nv50->base, nv50->screen->code, (prog->type << 16) + prog->code_base, NOUVEAU_BO_VRAM, prog->code_size, prog->code); diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c index 6b1106341ce..17f272bb3bf 100644 --- a/src/gallium/drivers/nv50/nv50_state.c +++ b/src/gallium/drivers/nv50/nv50_state.c @@ -793,55 +793,57 @@ nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso) void nv50_init_state_functions(struct nv50_context *nv50) { - nv50->pipe.create_blend_state = nv50_blend_state_create; - nv50->pipe.bind_blend_state = nv50_blend_state_bind; - nv50->pipe.delete_blend_state = nv50_blend_state_delete; - - nv50->pipe.create_rasterizer_state = nv50_rasterizer_state_create; - nv50->pipe.bind_rasterizer_state = nv50_rasterizer_state_bind; - nv50->pipe.delete_rasterizer_state = nv50_rasterizer_state_delete; - - nv50->pipe.create_depth_stencil_alpha_state = nv50_zsa_state_create; - nv50->pipe.bind_depth_stencil_alpha_state = nv50_zsa_state_bind; - nv50->pipe.delete_depth_stencil_alpha_state = nv50_zsa_state_delete; - - nv50->pipe.create_sampler_state = nv50_sampler_state_create; - nv50->pipe.delete_sampler_state = nv50_sampler_state_delete; - nv50->pipe.bind_vertex_sampler_states = nv50_vp_sampler_states_bind; - nv50->pipe.bind_fragment_sampler_states = nv50_fp_sampler_states_bind; - nv50->pipe.bind_geometry_sampler_states = nv50_gp_sampler_states_bind; - - nv50->pipe.create_sampler_view = nv50_create_sampler_view; - nv50->pipe.sampler_view_destroy = nv50_sampler_view_destroy; - nv50->pipe.set_vertex_sampler_views = nv50_vp_set_sampler_views; - nv50->pipe.set_fragment_sampler_views = nv50_fp_set_sampler_views; - nv50->pipe.set_geometry_sampler_views = nv50_gp_set_sampler_views; + struct pipe_context *pipe = &nv50->base.pipe; + + pipe->create_blend_state = nv50_blend_state_create; + pipe->bind_blend_state = nv50_blend_state_bind; + pipe->delete_blend_state = nv50_blend_state_delete; + + pipe->create_rasterizer_state = nv50_rasterizer_state_create; + pipe->bind_rasterizer_state = nv50_rasterizer_state_bind; + pipe->delete_rasterizer_state = nv50_rasterizer_state_delete; + + pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create; + pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind; + pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete; + + pipe->create_sampler_state = nv50_sampler_state_create; + pipe->delete_sampler_state = nv50_sampler_state_delete; + pipe->bind_vertex_sampler_states = nv50_vp_sampler_states_bind; + pipe->bind_fragment_sampler_states = nv50_fp_sampler_states_bind; + pipe->bind_geometry_sampler_states = nv50_gp_sampler_states_bind; + + pipe->create_sampler_view = nv50_create_sampler_view; + pipe->sampler_view_destroy = nv50_sampler_view_destroy; + pipe->set_vertex_sampler_views = nv50_vp_set_sampler_views; + pipe->set_fragment_sampler_views = nv50_fp_set_sampler_views; + pipe->set_geometry_sampler_views = nv50_gp_set_sampler_views; - nv50->pipe.create_vs_state = nv50_vp_state_create; - nv50->pipe.create_fs_state = nv50_fp_state_create; - nv50->pipe.create_gs_state = nv50_gp_state_create; - nv50->pipe.bind_vs_state = nv50_vp_state_bind; - nv50->pipe.bind_fs_state = nv50_fp_state_bind; - nv50->pipe.bind_gs_state = nv50_gp_state_bind; - nv50->pipe.delete_vs_state = nv50_sp_state_delete; - nv50->pipe.delete_fs_state = nv50_sp_state_delete; - nv50->pipe.delete_gs_state = nv50_sp_state_delete; - - nv50->pipe.set_blend_color = nv50_set_blend_color; - nv50->pipe.set_stencil_ref = nv50_set_stencil_ref; - nv50->pipe.set_clip_state = nv50_set_clip_state; - nv50->pipe.set_sample_mask = nv50_set_sample_mask; - nv50->pipe.set_constant_buffer = nv50_set_constant_buffer; - nv50->pipe.set_framebuffer_state = nv50_set_framebuffer_state; - nv50->pipe.set_polygon_stipple = nv50_set_polygon_stipple; - nv50->pipe.set_scissor_state = nv50_set_scissor_state; - nv50->pipe.set_viewport_state = nv50_set_viewport_state; - - nv50->pipe.create_vertex_elements_state = nv50_vertex_state_create; - nv50->pipe.delete_vertex_elements_state = nv50_vertex_state_delete; - nv50->pipe.bind_vertex_elements_state = nv50_vertex_state_bind; - - nv50->pipe.set_vertex_buffers = nv50_set_vertex_buffers; - nv50->pipe.set_index_buffer = nv50_set_index_buffer; + pipe->create_vs_state = nv50_vp_state_create; + pipe->create_fs_state = nv50_fp_state_create; + pipe->create_gs_state = nv50_gp_state_create; + pipe->bind_vs_state = nv50_vp_state_bind; + pipe->bind_fs_state = nv50_fp_state_bind; + pipe->bind_gs_state = nv50_gp_state_bind; + pipe->delete_vs_state = nv50_sp_state_delete; + pipe->delete_fs_state = nv50_sp_state_delete; + pipe->delete_gs_state = nv50_sp_state_delete; + + pipe->set_blend_color = nv50_set_blend_color; + pipe->set_stencil_ref = nv50_set_stencil_ref; + pipe->set_clip_state = nv50_set_clip_state; + pipe->set_sample_mask = nv50_set_sample_mask; + pipe->set_constant_buffer = nv50_set_constant_buffer; + pipe->set_framebuffer_state = nv50_set_framebuffer_state; + pipe->set_polygon_stipple = nv50_set_polygon_stipple; + pipe->set_scissor_state = nv50_set_scissor_state; + pipe->set_viewport_state = nv50_set_viewport_state; + + pipe->create_vertex_elements_state = nv50_vertex_state_create; + pipe->delete_vertex_elements_state = nv50_vertex_state_delete; + pipe->bind_vertex_elements_state = nv50_vertex_state_bind; + + pipe->set_vertex_buffers = nv50_set_vertex_buffers; + pipe->set_index_buffer = nv50_set_index_buffer; } diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index b1f54f623ab..dc9e2880f0f 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -371,9 +371,11 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, void nv50_init_surface_functions(struct nv50_context *nv50) { - nv50->pipe.resource_copy_region = nv50_resource_copy_region; - nv50->pipe.clear_render_target = nv50_clear_render_target; - nv50->pipe.clear_depth_stencil = nv50_clear_depth_stencil; + struct pipe_context *pipe = &nv50->base.pipe; + + pipe->resource_copy_region = nv50_resource_copy_region; + pipe->clear_render_target = nv50_clear_render_target; + pipe->clear_depth_stencil = nv50_clear_depth_stencil; } diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c index a76139ad37e..4456553a868 100644 --- a/src/gallium/drivers/nv50/nv50_tex.c +++ b/src/gallium/drivers/nv50/nv50_tex.c @@ -269,7 +269,7 @@ nv50_validate_tsc(struct nv50_context *nv50, int s) if (tsc->id < 0) { tsc->id = nv50_screen_tsc_alloc(nv50->screen, tsc); - nv50_sifc_linear_u8(&nv50->pipe, nv50->screen->txc, + nv50_sifc_linear_u8(&nv50->base, nv50->screen->txc, 65536 + tsc->id * 32, NOUVEAU_BO_VRAM, 32, tsc->tsc); need_flush = TRUE; diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c index d80a5354904..74869774595 100644 --- a/src/gallium/drivers/nv50/nv50_transfer.c +++ b/src/gallium/drivers/nv50/nv50_transfer.c @@ -102,12 +102,11 @@ nv50_m2mf_transfer_rect(struct pipe_screen *pscreen, } void -nv50_sifc_linear_u8(struct pipe_context *pipe, +nv50_sifc_linear_u8(struct nouveau_context *nv, struct nouveau_bo *dst, unsigned offset, unsigned domain, unsigned size, void *data) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nouveau_channel *chan = nv50->screen->base.channel; + struct nouveau_channel *chan = nv->screen->channel; uint32_t *src = (uint32_t *)data; unsigned count = (size + 3) / 4; unsigned xcoord = offset & 0xff; @@ -159,13 +158,12 @@ nv50_sifc_linear_u8(struct pipe_context *pipe, } void -nv50_m2mf_copy_linear(struct pipe_context *pipe, +nv50_m2mf_copy_linear(struct nouveau_context *nv, struct nouveau_bo *dst, unsigned dstoff, unsigned dstdom, struct nouveau_bo *src, unsigned srcoff, unsigned srcdom, unsigned size) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nouveau_channel *chan = nv50->screen->base.channel; + struct nouveau_channel *chan = nv->screen->channel; BEGIN_RING(chan, RING_MF(LINEAR_IN), 1); OUT_RING (chan, 1); diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c index 1f0d34ed792..e94a2b6fa3d 100644 --- a/src/gallium/drivers/nv50/nv50_vbo.c +++ b/src/gallium/drivers/nv50/nv50_vbo.c @@ -131,7 +131,7 @@ nv50_emit_vtxattr(struct nv50_context *nv50, struct pipe_vertex_buffer *vb, float v[4]; const unsigned nc = util_format_get_nr_components(ve->src_format); - data = nouveau_resource_map_offset(&nv50->pipe, res, vb->buffer_offset + + data = nouveau_resource_map_offset(&nv50->base, res, vb->buffer_offset + ve->src_offset, NOUVEAU_BO_RD); util_format_read_4f(ve->src_format, v, 0, data, 0, 0, 0, 1, 1); @@ -215,13 +215,13 @@ nv50_prevalidate_vbufs(struct nv50_context *nv50) nv50_vbuf_range(nv50, i, &base, &size); nouveau_user_buffer_upload(buf, base, size); } else { - nouveau_buffer_migrate(&nv50->pipe, buf, NOUVEAU_BO_GART); + nouveau_buffer_migrate(&nv50->base, buf, NOUVEAU_BO_GART); } - nv50->vbo_dirty = TRUE; + nv50->base.vbo_dirty = TRUE; } } nv50_bufctx_add_resident(nv50, NV50_BUFCTX_VERTEX, buf, NOUVEAU_BO_RD); - nouveau_buffer_adjust_score(&nv50->pipe, buf, 1); + nouveau_buffer_adjust_score(&nv50->base, buf, 1); } } @@ -262,7 +262,7 @@ nv50_update_user_vbufs(struct nv50_context *nv50) OUT_RESRCh(chan, buf, offset, NOUVEAU_BO_RD); OUT_RESRCl(chan, buf, offset, NOUVEAU_BO_RD); } - nv50->vbo_dirty = TRUE; + nv50->base.vbo_dirty = TRUE; } static INLINE void @@ -540,7 +540,7 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten, struct nv04_resource *res = nv04_resource(nv50->idxbuf.buffer); unsigned offset = res->offset + nv50->idxbuf.offset; - nouveau_buffer_adjust_score(&nv50->pipe, res, 1); + nouveau_buffer_adjust_score(&nv50->base, res, 1); while (instance_count--) { BEGIN_RING(chan, RING_3D(VERTEX_BEGIN_GL), 1); @@ -597,7 +597,7 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten, mode |= NV50_3D_VERTEX_BEGIN_GL_INSTANCE_NEXT; } } else { - data = nouveau_resource_map_offset(&nv50->pipe, + data = nouveau_resource_map_offset(&nv50->base, nv04_resource(nv50->idxbuf.buffer), nv50->idxbuf.offset, NOUVEAU_BO_RD); if (!data) @@ -669,10 +669,10 @@ nv50_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) OUT_RING (chan, info->start_instance); } - if (nv50->vbo_dirty) { + if (nv50->base.vbo_dirty) { BEGIN_RING(chan, RING_3D(VERTEX_ARRAY_FLUSH), 1); OUT_RING (chan, 0); - nv50->vbo_dirty = FALSE; + nv50->base.vbo_dirty = FALSE; } if (!info->indexed) { diff --git a/src/gallium/drivers/nvc0/nvc0_context.c b/src/gallium/drivers/nvc0/nvc0_context.c index 4979aab51c4..d5dcf1fb028 100644 --- a/src/gallium/drivers/nvc0/nvc0_context.c +++ b/src/gallium/drivers/nvc0/nvc0_context.c @@ -84,22 +84,28 @@ nvc0_create(struct pipe_screen *pscreen, void *priv) struct pipe_winsys *pipe_winsys = pscreen->winsys; struct nvc0_screen *screen = nvc0_screen(pscreen); struct nvc0_context *nvc0; + struct pipe_context *pipe; nvc0 = CALLOC_STRUCT(nvc0_context); if (!nvc0) return NULL; + pipe = &nvc0->base.pipe; + nvc0->screen = screen; + nvc0->base.screen = &screen->base; + nvc0->base.copy_data = nvc0_m2mf_copy_linear; + nvc0->base.push_data = nvc0_m2mf_push_linear; - nvc0->pipe.winsys = pipe_winsys; - nvc0->pipe.screen = pscreen; - nvc0->pipe.priv = priv; + pipe->winsys = pipe_winsys; + pipe->screen = pscreen; + pipe->priv = priv; - nvc0->pipe.destroy = nvc0_destroy; + pipe->destroy = nvc0_destroy; - nvc0->pipe.draw_vbo = nvc0_draw_vbo; - nvc0->pipe.clear = nvc0_clear; + pipe->draw_vbo = nvc0_draw_vbo; + pipe->clear = nvc0_clear; - nvc0->pipe.flush = nvc0_flush; + pipe->flush = nvc0_flush; if (!screen->cur_ctx) screen->cur_ctx = nvc0; @@ -109,13 +115,13 @@ nvc0_create(struct pipe_screen *pscreen, void *priv) nvc0_init_query_functions(nvc0); nvc0_init_surface_functions(nvc0); nvc0_init_state_functions(nvc0); - nvc0_init_resource_functions(&nvc0->pipe); + nvc0_init_resource_functions(pipe); - nvc0->draw = draw_create(&nvc0->pipe); + nvc0->draw = draw_create(pipe); assert(nvc0->draw); draw_set_rasterize_stage(nvc0->draw, nvc0_draw_render_stage(nvc0)); - return &nvc0->pipe; + return pipe; } struct resident { diff --git a/src/gallium/drivers/nvc0/nvc0_context.h b/src/gallium/drivers/nvc0/nvc0_context.h index d779777ed3a..114e664fc58 100644 --- a/src/gallium/drivers/nvc0/nvc0_context.h +++ b/src/gallium/drivers/nvc0/nvc0_context.h @@ -19,6 +19,8 @@ #include "nvc0_program.h" #include "nvc0_resource.h" +#include "nouveau/nouveau_context.h" + #include "nvc0_3ddefs.xml.h" #include "nvc0_3d.xml.h" #include "nvc0_2d.xml.h" @@ -64,7 +66,7 @@ #define NVC0_BUFCTX_COUNT 4 struct nvc0_context { - struct pipe_context pipe; + struct nouveau_context base; struct nvc0_screen *screen; @@ -123,7 +125,6 @@ struct nvc0_context { unsigned sample_mask; - boolean vbo_dirty; boolean vbo_push_hint; struct nvc0_transform_feedback_state *tfb; @@ -211,11 +212,11 @@ nvc0_create_sampler_view(struct pipe_context *, /* nvc0_transfer.c */ void -nvc0_m2mf_push_linear(struct pipe_context *pipe, +nvc0_m2mf_push_linear(struct nouveau_context *nv, struct nouveau_bo *dst, unsigned offset, unsigned domain, unsigned size, void *data); void -nvc0_m2mf_copy_linear(struct pipe_context *pipe, +nvc0_m2mf_copy_linear(struct nouveau_context *nv, struct nouveau_bo *dst, unsigned dstoff, unsigned dstdom, struct nouveau_bo *src, unsigned srcoff, unsigned srcdom, unsigned size); diff --git a/src/gallium/drivers/nvc0/nvc0_push.c b/src/gallium/drivers/nvc0/nvc0_push.c index 84533f0443e..68544c90d29 100644 --- a/src/gallium/drivers/nvc0/nvc0_push.c +++ b/src/gallium/drivers/nvc0/nvc0_push.c @@ -229,7 +229,7 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info) struct pipe_vertex_buffer *vb = &nvc0->vtxbuf[i]; struct nv04_resource *res = nv04_resource(vb->buffer); - data = nouveau_resource_map_offset(&nvc0->pipe, res, + data = nouveau_resource_map_offset(&nvc0->base, res, vb->buffer_offset, NOUVEAU_BO_RD); if (apply_bias && likely(!(nvc0->vertex->instance_bufs & (1 << i)))) @@ -239,7 +239,7 @@ nvc0_push_vbo(struct nvc0_context *nvc0, const struct pipe_draw_info *info) } if (info->indexed) { - ctx.idxbuf = nouveau_resource_map_offset(&nvc0->pipe, + ctx.idxbuf = nouveau_resource_map_offset(&nvc0->base, nv04_resource(nvc0->idxbuf.buffer), nvc0->idxbuf.offset, NOUVEAU_BO_RD); if (!ctx.idxbuf) diff --git a/src/gallium/drivers/nvc0/nvc0_query.c b/src/gallium/drivers/nvc0/nvc0_query.c index 338359bdfd2..ead015b6b84 100644 --- a/src/gallium/drivers/nvc0/nvc0_query.c +++ b/src/gallium/drivers/nvc0/nvc0_query.c @@ -330,10 +330,12 @@ nvc0_render_condition(struct pipe_context *pipe, void nvc0_init_query_functions(struct nvc0_context *nvc0) { - nvc0->pipe.create_query = nvc0_query_create; - nvc0->pipe.destroy_query = nvc0_query_destroy; - nvc0->pipe.begin_query = nvc0_query_begin; - nvc0->pipe.end_query = nvc0_query_end; - nvc0->pipe.get_query_result = nvc0_query_result; - nvc0->pipe.render_condition = nvc0_render_condition; + struct pipe_context *pipe = &nvc0->base.pipe; + + pipe->create_query = nvc0_query_create; + pipe->destroy_query = nvc0_query_destroy; + pipe->begin_query = nvc0_query_begin; + pipe->end_query = nvc0_query_end; + pipe->get_query_result = nvc0_query_result; + pipe->render_condition = nvc0_render_condition; } diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c b/src/gallium/drivers/nvc0/nvc0_screen.c index 82209c58c2c..b84a1bee8da 100644 --- a/src/gallium/drivers/nvc0/nvc0_screen.c +++ b/src/gallium/drivers/nvc0/nvc0_screen.c @@ -377,8 +377,6 @@ nvc0_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) screen->base.vertex_buffer_flags = NOUVEAU_BO_GART; screen->base.index_buffer_flags = 0; - screen->base.copy_data = nvc0_m2mf_copy_linear; - screen->base.push_data = nvc0_m2mf_push_linear; ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, 4096, &screen->fence.bo); diff --git a/src/gallium/drivers/nvc0/nvc0_shader_state.c b/src/gallium/drivers/nvc0/nvc0_shader_state.c index 765f1dae576..79b5f3d81cc 100644 --- a/src/gallium/drivers/nvc0/nvc0_shader_state.c +++ b/src/gallium/drivers/nvc0/nvc0_shader_state.c @@ -59,9 +59,9 @@ nvc0_program_validate(struct nvc0_context *nvc0, struct nvc0_program *prog) prog->code_base = prog->res->start; - nvc0_m2mf_push_linear(&nvc0->pipe, nvc0->screen->text, prog->code_base, + nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->text, prog->code_base, NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr); - nvc0_m2mf_push_linear(&nvc0->pipe, nvc0->screen->text, + nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->text, prog->code_base + NVC0_SHADER_HEADER_SIZE, NOUVEAU_BO_VRAM, prog->code_size, prog->code); diff --git a/src/gallium/drivers/nvc0/nvc0_state.c b/src/gallium/drivers/nvc0/nvc0_state.c index 36c751e251c..ee4680efeca 100644 --- a/src/gallium/drivers/nvc0/nvc0_state.c +++ b/src/gallium/drivers/nvc0/nvc0_state.c @@ -876,62 +876,64 @@ nvc0_set_transform_feedback_buffers(struct pipe_context *pipe, void nvc0_init_state_functions(struct nvc0_context *nvc0) { - nvc0->pipe.create_blend_state = nvc0_blend_state_create; - nvc0->pipe.bind_blend_state = nvc0_blend_state_bind; - nvc0->pipe.delete_blend_state = nvc0_blend_state_delete; - - nvc0->pipe.create_rasterizer_state = nvc0_rasterizer_state_create; - nvc0->pipe.bind_rasterizer_state = nvc0_rasterizer_state_bind; - nvc0->pipe.delete_rasterizer_state = nvc0_rasterizer_state_delete; - - nvc0->pipe.create_depth_stencil_alpha_state = nvc0_zsa_state_create; - nvc0->pipe.bind_depth_stencil_alpha_state = nvc0_zsa_state_bind; - nvc0->pipe.delete_depth_stencil_alpha_state = nvc0_zsa_state_delete; - - nvc0->pipe.create_sampler_state = nvc0_sampler_state_create; - nvc0->pipe.delete_sampler_state = nvc0_sampler_state_delete; - nvc0->pipe.bind_vertex_sampler_states = nvc0_vp_sampler_states_bind; - nvc0->pipe.bind_fragment_sampler_states = nvc0_fp_sampler_states_bind; - nvc0->pipe.bind_geometry_sampler_states = nvc0_gp_sampler_states_bind; - - nvc0->pipe.create_sampler_view = nvc0_create_sampler_view; - nvc0->pipe.sampler_view_destroy = nvc0_sampler_view_destroy; - nvc0->pipe.set_vertex_sampler_views = nvc0_vp_set_sampler_views; - nvc0->pipe.set_fragment_sampler_views = nvc0_fp_set_sampler_views; - nvc0->pipe.set_geometry_sampler_views = nvc0_gp_set_sampler_views; - - nvc0->pipe.create_vs_state = nvc0_vp_state_create; - nvc0->pipe.create_fs_state = nvc0_fp_state_create; - nvc0->pipe.create_gs_state = nvc0_gp_state_create; - nvc0->pipe.bind_vs_state = nvc0_vp_state_bind; - nvc0->pipe.bind_fs_state = nvc0_fp_state_bind; - nvc0->pipe.bind_gs_state = nvc0_gp_state_bind; - nvc0->pipe.delete_vs_state = nvc0_sp_state_delete; - nvc0->pipe.delete_fs_state = nvc0_sp_state_delete; - nvc0->pipe.delete_gs_state = nvc0_sp_state_delete; - - nvc0->pipe.set_blend_color = nvc0_set_blend_color; - nvc0->pipe.set_stencil_ref = nvc0_set_stencil_ref; - nvc0->pipe.set_clip_state = nvc0_set_clip_state; - nvc0->pipe.set_sample_mask = nvc0_set_sample_mask; - nvc0->pipe.set_constant_buffer = nvc0_set_constant_buffer; - nvc0->pipe.set_framebuffer_state = nvc0_set_framebuffer_state; - nvc0->pipe.set_polygon_stipple = nvc0_set_polygon_stipple; - nvc0->pipe.set_scissor_state = nvc0_set_scissor_state; - nvc0->pipe.set_viewport_state = nvc0_set_viewport_state; - - nvc0->pipe.create_vertex_elements_state = nvc0_vertex_state_create; - nvc0->pipe.delete_vertex_elements_state = nvc0_vertex_state_delete; - nvc0->pipe.bind_vertex_elements_state = nvc0_vertex_state_bind; - - nvc0->pipe.set_vertex_buffers = nvc0_set_vertex_buffers; - nvc0->pipe.set_index_buffer = nvc0_set_index_buffer; - - nvc0->pipe.create_stream_output_state = nvc0_tfb_state_create; - nvc0->pipe.delete_stream_output_state = nvc0_tfb_state_delete; - nvc0->pipe.bind_stream_output_state = nvc0_tfb_state_bind; - nvc0->pipe.set_stream_output_buffers = nvc0_set_transform_feedback_buffers; - - nvc0->pipe.redefine_user_buffer = u_default_redefine_user_buffer; + struct pipe_context *pipe = &nvc0->base.pipe; + + pipe->create_blend_state = nvc0_blend_state_create; + pipe->bind_blend_state = nvc0_blend_state_bind; + pipe->delete_blend_state = nvc0_blend_state_delete; + + pipe->create_rasterizer_state = nvc0_rasterizer_state_create; + pipe->bind_rasterizer_state = nvc0_rasterizer_state_bind; + pipe->delete_rasterizer_state = nvc0_rasterizer_state_delete; + + pipe->create_depth_stencil_alpha_state = nvc0_zsa_state_create; + pipe->bind_depth_stencil_alpha_state = nvc0_zsa_state_bind; + pipe->delete_depth_stencil_alpha_state = nvc0_zsa_state_delete; + + pipe->create_sampler_state = nvc0_sampler_state_create; + pipe->delete_sampler_state = nvc0_sampler_state_delete; + pipe->bind_vertex_sampler_states = nvc0_vp_sampler_states_bind; + pipe->bind_fragment_sampler_states = nvc0_fp_sampler_states_bind; + pipe->bind_geometry_sampler_states = nvc0_gp_sampler_states_bind; + + pipe->create_sampler_view = nvc0_create_sampler_view; + pipe->sampler_view_destroy = nvc0_sampler_view_destroy; + pipe->set_vertex_sampler_views = nvc0_vp_set_sampler_views; + pipe->set_fragment_sampler_views = nvc0_fp_set_sampler_views; + pipe->set_geometry_sampler_views = nvc0_gp_set_sampler_views; + + pipe->create_vs_state = nvc0_vp_state_create; + pipe->create_fs_state = nvc0_fp_state_create; + pipe->create_gs_state = nvc0_gp_state_create; + pipe->bind_vs_state = nvc0_vp_state_bind; + pipe->bind_fs_state = nvc0_fp_state_bind; + pipe->bind_gs_state = nvc0_gp_state_bind; + pipe->delete_vs_state = nvc0_sp_state_delete; + pipe->delete_fs_state = nvc0_sp_state_delete; + pipe->delete_gs_state = nvc0_sp_state_delete; + + pipe->set_blend_color = nvc0_set_blend_color; + pipe->set_stencil_ref = nvc0_set_stencil_ref; + pipe->set_clip_state = nvc0_set_clip_state; + pipe->set_sample_mask = nvc0_set_sample_mask; + pipe->set_constant_buffer = nvc0_set_constant_buffer; + pipe->set_framebuffer_state = nvc0_set_framebuffer_state; + pipe->set_polygon_stipple = nvc0_set_polygon_stipple; + pipe->set_scissor_state = nvc0_set_scissor_state; + pipe->set_viewport_state = nvc0_set_viewport_state; + + pipe->create_vertex_elements_state = nvc0_vertex_state_create; + pipe->delete_vertex_elements_state = nvc0_vertex_state_delete; + pipe->bind_vertex_elements_state = nvc0_vertex_state_bind; + + pipe->set_vertex_buffers = nvc0_set_vertex_buffers; + pipe->set_index_buffer = nvc0_set_index_buffer; + + pipe->create_stream_output_state = nvc0_tfb_state_create; + pipe->delete_stream_output_state = nvc0_tfb_state_delete; + pipe->bind_stream_output_state = nvc0_tfb_state_bind; + pipe->set_stream_output_buffers = nvc0_set_transform_feedback_buffers; + + pipe->redefine_user_buffer = u_default_redefine_user_buffer; } diff --git a/src/gallium/drivers/nvc0/nvc0_surface.c b/src/gallium/drivers/nvc0/nvc0_surface.c index 6f39bbbb170..a4b2b948123 100644 --- a/src/gallium/drivers/nvc0/nvc0_surface.c +++ b/src/gallium/drivers/nvc0/nvc0_surface.c @@ -367,9 +367,11 @@ nvc0_clear(struct pipe_context *pipe, unsigned buffers, void nvc0_init_surface_functions(struct nvc0_context *nvc0) { - nvc0->pipe.resource_copy_region = nvc0_resource_copy_region; - nvc0->pipe.clear_render_target = nvc0_clear_render_target; - nvc0->pipe.clear_depth_stencil = nvc0_clear_depth_stencil; + struct pipe_context *pipe = &nvc0->base.pipe; + + pipe->resource_copy_region = nvc0_resource_copy_region; + pipe->clear_render_target = nvc0_clear_render_target; + pipe->clear_depth_stencil = nvc0_clear_depth_stencil; } diff --git a/src/gallium/drivers/nvc0/nvc0_tex.c b/src/gallium/drivers/nvc0/nvc0_tex.c index f651e54e1db..6822e597b36 100644 --- a/src/gallium/drivers/nvc0/nvc0_tex.c +++ b/src/gallium/drivers/nvc0/nvc0_tex.c @@ -252,7 +252,7 @@ nvc0_validate_tsc(struct nvc0_context *nvc0, int s) if (tsc->id < 0) { tsc->id = nvc0_screen_tsc_alloc(nvc0->screen, tsc); - nvc0_m2mf_push_linear(&nvc0->pipe, nvc0->screen->txc, + nvc0_m2mf_push_linear(&nvc0->base, nvc0->screen->txc, 65536 + tsc->id * 32, NOUVEAU_BO_VRAM, 32, tsc->tsc); need_flush = TRUE; diff --git a/src/gallium/drivers/nvc0/nvc0_transfer.c b/src/gallium/drivers/nvc0/nvc0_transfer.c index bbb24fa0528..a38bdb8f0a6 100644 --- a/src/gallium/drivers/nvc0/nvc0_transfer.c +++ b/src/gallium/drivers/nvc0/nvc0_transfer.c @@ -104,12 +104,11 @@ nvc0_m2mf_transfer_rect(struct pipe_screen *pscreen, } void -nvc0_m2mf_push_linear(struct pipe_context *pipe, +nvc0_m2mf_push_linear(struct nouveau_context *nv, struct nouveau_bo *dst, unsigned offset, unsigned domain, unsigned size, void *data) { - struct nvc0_context *nvc0 = nvc0_context(pipe); - struct nouveau_channel *chan = nvc0->screen->base.channel; + struct nouveau_channel *chan = nv->screen->channel; uint32_t *src = (uint32_t *)data; unsigned count = (size + 3) / 4; @@ -144,13 +143,12 @@ nvc0_m2mf_push_linear(struct pipe_context *pipe, } void -nvc0_m2mf_copy_linear(struct pipe_context *pipe, +nvc0_m2mf_copy_linear(struct nouveau_context *nv, struct nouveau_bo *dst, unsigned dstoff, unsigned dstdom, struct nouveau_bo *src, unsigned srcoff, unsigned srcdom, unsigned size) { - struct nvc0_context *nvc0 = nvc0_context(pipe); - struct nouveau_channel *chan = nvc0->screen->base.channel; + struct nouveau_channel *chan = nv->screen->channel; while (size) { unsigned bytes = MIN2(size, 1 << 17); diff --git a/src/gallium/drivers/nvc0/nvc0_vbo.c b/src/gallium/drivers/nvc0/nvc0_vbo.c index 14bea675a11..e7e7ce7dc22 100644 --- a/src/gallium/drivers/nvc0/nvc0_vbo.c +++ b/src/gallium/drivers/nvc0/nvc0_vbo.c @@ -136,7 +136,7 @@ nvc0_emit_vtxattr(struct nvc0_context *nvc0, struct pipe_vertex_buffer *vb, int i; const unsigned nc = util_format_get_nr_components(ve->src_format); - data = nouveau_resource_map_offset(&nvc0->pipe, res, vb->buffer_offset + + data = nouveau_resource_map_offset(&nvc0->base, res, vb->buffer_offset + ve->src_offset, NOUVEAU_BO_RD); util_format_read_4f(ve->src_format, v, 0, data, 0, 0, 0, 1, 1); @@ -193,13 +193,13 @@ nvc0_prevalidate_vbufs(struct nvc0_context *nvc0) nvc0_vbuf_range(nvc0, i, &base, &size); nouveau_user_buffer_upload(buf, base, size); } else { - nouveau_buffer_migrate(&nvc0->pipe, buf, NOUVEAU_BO_GART); + nouveau_buffer_migrate(&nvc0->base, buf, NOUVEAU_BO_GART); } - nvc0->vbo_dirty = TRUE; + nvc0->base.vbo_dirty = TRUE; } } nvc0_bufctx_add_resident(nvc0, NVC0_BUFCTX_VERTEX, buf, NOUVEAU_BO_RD); - nouveau_buffer_adjust_score(&nvc0->pipe, buf, 1); + nouveau_buffer_adjust_score(&nvc0->base, buf, 1); } } @@ -240,7 +240,7 @@ nvc0_update_user_vbufs(struct nvc0_context *nvc0) OUT_RESRCh(chan, buf, offset, NOUVEAU_BO_RD); OUT_RESRCl(chan, buf, offset, NOUVEAU_BO_RD); } - nvc0->vbo_dirty = TRUE; + nvc0->base.vbo_dirty = TRUE; } static INLINE void @@ -518,7 +518,7 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten, unsigned offset = nvc0->idxbuf.offset; unsigned limit = nvc0->idxbuf.buffer->width0 - 1; - nouveau_buffer_adjust_score(&nvc0->pipe, res, 1); + nouveau_buffer_adjust_score(&nvc0->base, res, 1); while (instance_count--) { MARK_RING (chan, 11, 4); @@ -539,7 +539,7 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten, mode |= NVC0_3D_VERTEX_BEGIN_GL_INSTANCE_NEXT; } } else { - data = nouveau_resource_map_offset(&nvc0->pipe, + data = nouveau_resource_map_offset(&nvc0->base, nv04_resource(nvc0->idxbuf.buffer), nvc0->idxbuf.offset, NOUVEAU_BO_RD); if (!data) @@ -610,10 +610,10 @@ nvc0_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info) OUT_RING (chan, info->start_instance); } - if (nvc0->vbo_dirty) { + if (nvc0->base.vbo_dirty) { BEGIN_RING(chan, RING_3D(VERTEX_ARRAY_FLUSH), 1); OUT_RING (chan, 0); - nvc0->vbo_dirty = FALSE; + nvc0->base.vbo_dirty = FALSE; } if (!info->indexed) { -- cgit v1.2.3