From 46205ab8cc03cbda6bbc0c958e277f972973ebfe Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Thu, 11 Jul 2013 17:02:37 -0600 Subject: tgsi: rename the TGSI fragment kill opcodes TGSI_OPCODE_KIL and KILP had confusing names. The former was conditional kill (if any src component < 0). The later was unconditional kill. At one time KILP was supposed to work with NV-style condition codes/predicates but we never had that in TGSI. This patch renames both opcodes: TGSI_OPCODE_KIL -> KILL_IF (kill if src.xyzw < 0) TGSI_OPCODE_KILP -> KILL (unconditional kill) Note: I didn't just transpose the opcode names to help ensure that I didn't miss updating any code anywhere. I believe I've updated all the relevant code and comments but I'm not 100% sure that some drivers had this right in the first place. For example, the radeon driver might have llvm.AMDGPU.kill and llvm.AMDGPU.kilp mixed up. Driver authors should review their code. Reviewed-by: Jose Fonseca --- src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'src/gallium/drivers/nv50/codegen') diff --git a/src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp index 32c6fe819fa..56eccace59e 100644 --- a/src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nv50/codegen/nv50_ir_from_tgsi.cpp @@ -228,7 +228,7 @@ unsigned int Instruction::srcMask(unsigned int s) const return 0x7; case TGSI_OPCODE_DP4: case TGSI_OPCODE_DPH: - case TGSI_OPCODE_KIL: /* WriteMask ignored */ + case TGSI_OPCODE_KILL_IF: /* WriteMask ignored */ return 0xf; case TGSI_OPCODE_DST: return mask & (s ? 0xa : 0x6); @@ -512,7 +512,7 @@ static nv50_ir::operation translateOpcode(uint opcode) NV50_IR_OPCODE_CASE(COS, COS); NV50_IR_OPCODE_CASE(DDX, DFDX); NV50_IR_OPCODE_CASE(DDY, DFDY); - NV50_IR_OPCODE_CASE(KILP, DISCARD); + NV50_IR_OPCODE_CASE(KILL, DISCARD); NV50_IR_OPCODE_CASE(SEQ, SET); NV50_IR_OPCODE_CASE(SFL, SET); @@ -553,7 +553,7 @@ static nv50_ir::operation translateOpcode(uint opcode) NV50_IR_OPCODE_CASE(EMIT, EMIT); NV50_IR_OPCODE_CASE(ENDPRIM, RESTART); - NV50_IR_OPCODE_CASE(KIL, DISCARD); + NV50_IR_OPCODE_CASE(KILL_IF, DISCARD); NV50_IR_OPCODE_CASE(F2I, CVT); NV50_IR_OPCODE_CASE(IDIV, DIV); @@ -2366,14 +2366,14 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn) mkCmp(op, tgsi.getSetCond(), dstTy, dst0[c], src0, src1); } break; - case TGSI_OPCODE_KIL: + case TGSI_OPCODE_KILL_IF: val0 = new_LValue(func, FILE_PREDICATE); for (c = 0; c < 4; ++c) { mkCmp(OP_SET, CC_LT, TYPE_F32, val0, fetchSrc(0, c), zero); mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, val0); } break; - case TGSI_OPCODE_KILP: + case TGSI_OPCODE_KILL: mkOp(OP_DISCARD, TYPE_NONE, NULL); break; case TGSI_OPCODE_TEX: -- cgit v1.2.3