From a909210131494a6a131855d7d344b61b81fbf40e Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Tue, 9 Aug 2016 00:37:39 +0200 Subject: gallium: add render_condition_enable param to clear_render_target/depth_stencil MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Roland Scheidegger Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/nouveau/nv50/nv50_surface.c | 10 ++++++---- src/gallium/drivers/nouveau/nv50/nv84_video.c | 6 +++--- 2 files changed, 9 insertions(+), 7 deletions(-) (limited to 'src/gallium/drivers/nouveau/nv50') diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c index fbb5129908b..52e890786bd 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c @@ -277,7 +277,8 @@ nv50_clear_render_target(struct pipe_context *pipe, struct pipe_surface *dst, const union pipe_color_union *color, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct nv50_context *nv50 = nv50_context(pipe); struct nouveau_pushbuf *push = nv50->base.pushbuf; @@ -363,7 +364,8 @@ nv50_clear_depth_stencil(struct pipe_context *pipe, double depth, unsigned stencil, unsigned dstx, unsigned dsty, - unsigned width, unsigned height) + unsigned width, unsigned height, + bool render_condition_enabled) { struct nv50_context *nv50 = nv50_context(pipe); struct nouveau_pushbuf *push = nv50->base.pushbuf; @@ -472,7 +474,7 @@ nv50_clear_texture(struct pipe_context *pipe, desc->unpack_s_8uint(&stencil, 0, data, 0, 1, 1); } pipe->clear_depth_stencil(pipe, sf, clear, depth, stencil, - box->x, box->y, box->width, box->height); + box->x, box->y, box->width, box->height, false); } else { union pipe_color_union color; @@ -508,7 +510,7 @@ nv50_clear_texture(struct pipe_context *pipe, } pipe->clear_render_target(pipe, sf, &color, - box->x, box->y, box->width, box->height); + box->x, box->y, box->width, box->height, false); } pipe->surface_destroy(pipe, sf); } diff --git a/src/gallium/drivers/nouveau/nv50/nv84_video.c b/src/gallium/drivers/nouveau/nv50/nv84_video.c index 1b1f31ac485..409c40d632f 100644 --- a/src/gallium/drivers/nouveau/nv50/nv84_video.c +++ b/src/gallium/drivers/nouveau/nv50/nv84_video.c @@ -482,16 +482,16 @@ nv84_create_decoder(struct pipe_context *context, mip.base.domain = NOUVEAU_BO_VRAM; mip.base.bo = dec->mbring; mip.base.address = dec->mbring->offset; - context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760); + context->clear_render_target(context, &surf.base, &color, 0, 0, 64, 4760, false); surf.offset = dec->vpring->size / 2 - 0x1000; surf.width = 1024; surf.height = 1; mip.level[0].pitch = surf.width * 4; mip.base.bo = dec->vpring; mip.base.address = dec->vpring->offset; - context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); + context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1, false); surf.offset = dec->vpring->size - 0x1000; - context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1); + context->clear_render_target(context, &surf.base, &color, 0, 0, 1024, 1, false); PUSH_SPACE(screen->pushbuf, 5); PUSH_REFN(screen->pushbuf, dec->fence, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR); -- cgit v1.2.3