From 744b8e1c12f2f3857070a895bf6a4351f071a3f9 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 6 Mar 2019 14:49:39 -0800 Subject: iris: Fix MOCS for blits and clears I915_MOCS_CACHED is the wrong value. Expose mocs() and use that. --- src/gallium/drivers/iris/iris_blit.c | 19 ++++++++++--------- src/gallium/drivers/iris/iris_clear.c | 10 ++++++---- src/gallium/drivers/iris/iris_context.h | 4 +++- src/gallium/drivers/iris/iris_resolve.c | 11 ++++++----- src/gallium/drivers/iris/iris_state.c | 3 ++- 5 files changed, 27 insertions(+), 20 deletions(-) (limited to 'src/gallium/drivers/iris') diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c index 836c9e69132..eb795a08cbe 100644 --- a/src/gallium/drivers/iris/iris_blit.c +++ b/src/gallium/drivers/iris/iris_blit.c @@ -221,7 +221,8 @@ apply_blit_scissor(const struct pipe_scissor_state *scissor, } void -iris_blorp_surf_for_resource(struct blorp_surf *surf, +iris_blorp_surf_for_resource(struct iris_vtable *vtbl, + struct blorp_surf *surf, struct pipe_resource *p_res, enum isl_aux_usage aux_usage, unsigned level, @@ -239,7 +240,7 @@ iris_blorp_surf_for_resource(struct blorp_surf *surf, .buffer = res->bo, .offset = 0, // XXX: ??? .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0, - .mocs = I915_MOCS_CACHED, // XXX: BDW MOCS, PTE MOCS + .mocs = vtbl->mocs(res->bo), }, .aux_usage = aux_usage, }; @@ -250,7 +251,7 @@ iris_blorp_surf_for_resource(struct blorp_surf *surf, .buffer = res->aux.bo, .offset = res->aux.offset, .reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0, - .mocs = I915_MOCS_CACHED, + .mocs = vtbl->mocs(res->bo), }; } @@ -310,9 +311,9 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE; struct blorp_surf src_surf, dst_surf; - iris_blorp_surf_for_resource(&src_surf, info->src.resource, + iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, info->src.resource, src_aux_usage, info->src.level, false); - iris_blorp_surf_for_resource(&dst_surf, info->dst.resource, + iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, info->dst.resource, dst_aux_usage, info->dst.level, true); iris_resource_prepare_access(ice, batch, dst_res, info->dst.level, 1, @@ -418,9 +419,9 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) struct iris_resource *src_res, *dst_res, *junk; iris_get_depth_stencil_resources(info->src.resource, &junk, &src_res); iris_get_depth_stencil_resources(info->dst.resource, &junk, &dst_res); - iris_blorp_surf_for_resource(&src_surf, &src_res->base, + iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, &src_res->base, ISL_AUX_USAGE_NONE, info->src.level, false); - iris_blorp_surf_for_resource(&dst_surf, &dst_res->base, + iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, &dst_res->base, ISL_AUX_USAGE_NONE, info->dst.level, true); for (int slice = 0; slice < info->dst.box.depth; slice++) { @@ -520,9 +521,9 @@ iris_resource_copy_region(struct pipe_context *ctx, // XXX: what about one surface being a buffer and not the other? struct blorp_surf src_surf, dst_surf; - iris_blorp_surf_for_resource(&src_surf, src, src_aux_usage, + iris_blorp_surf_for_resource(&ice->vtbl, &src_surf, src, src_aux_usage, src_level, false); - iris_blorp_surf_for_resource(&dst_surf, dst, dst_aux_usage, + iris_blorp_surf_for_resource(&ice->vtbl, &dst_surf, dst, dst_aux_usage, dst_level, true); iris_resource_prepare_access(ice, batch, src_res, src_level, 1, diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c index a7d8228ee5a..e71d7f450bd 100644 --- a/src/gallium/drivers/iris/iris_clear.c +++ b/src/gallium/drivers/iris/iris_clear.c @@ -72,7 +72,8 @@ clear_color(struct iris_context *ice, box->z, box->depth, aux_usage); struct blorp_surf surf; - iris_blorp_surf_for_resource(&surf, p_res, aux_usage, level, true); + iris_blorp_surf_for_resource(&ice->vtbl, &surf, p_res, aux_usage, level, + true); if (!isl_format_supports_rendering(devinfo, format) && isl_format_is_rgbx(format)) @@ -129,13 +130,14 @@ clear_depth_stencil(struct iris_context *ice, if (z_res) { iris_resource_prepare_depth(ice, batch, z_res, level, box->z, box->depth); - iris_blorp_surf_for_resource(&z_surf, &z_res->base, + iris_blorp_surf_for_resource(&ice->vtbl, &z_surf, &z_res->base, z_res->aux.usage, level, true); } if (stencil_res) { - iris_blorp_surf_for_resource(&stencil_surf, &stencil_res->base, - stencil_res->aux.usage, level, true); + iris_blorp_surf_for_resource(&ice->vtbl, &stencil_surf, + &stencil_res->base, stencil_res->aux.usage, + level, true); } blorp_clear_depth_stencil(&blorp_batch, &z_surf, &stencil_surf, diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index 87439718a94..771c47ffced 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -410,6 +410,7 @@ struct iris_vtable { struct brw_wm_prog_key *key); void (*populate_cs_key)(const struct iris_context *ice, struct brw_cs_prog_key *key); + uint32_t (*mocs)(const struct iris_bo *bo); }; /** @@ -659,7 +660,8 @@ void iris_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data, /* iris_blit.c */ -void iris_blorp_surf_for_resource(struct blorp_surf *surf, +void iris_blorp_surf_for_resource(struct iris_vtable *vtbl, + struct blorp_surf *surf, struct pipe_resource *p_res, enum isl_aux_usage aux_usage, unsigned level, diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c index e30e63f00cc..6989f89aa21 100644 --- a/src/gallium/drivers/iris/iris_resolve.c +++ b/src/gallium/drivers/iris/iris_resolve.c @@ -409,8 +409,8 @@ iris_resolve_color(struct iris_context *ice, //DBG("%s to mt %p level %u layer %u\n", __FUNCTION__, mt, level, layer); struct blorp_surf surf; - iris_blorp_surf_for_resource(&surf, &res->base, res->aux.usage, level, - true); + iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base, res->aux.usage, + level, true); iris_batch_maybe_flush(batch, 1500); @@ -452,7 +452,8 @@ iris_mcs_partial_resolve(struct iris_context *ice, assert(res->aux.usage == ISL_AUX_USAGE_MCS); struct blorp_surf surf; - iris_blorp_surf_for_resource(&surf, &res->base, res->aux.usage, 0, true); + iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base, res->aux.usage, + 0, true); struct blorp_batch blorp_batch; blorp_batch_init(&ice->blorp, &blorp_batch, batch, 0); @@ -590,8 +591,8 @@ iris_hiz_exec(struct iris_context *ice, iris_batch_maybe_flush(batch, 1500); struct blorp_surf surf; - iris_blorp_surf_for_resource(&surf, &res->base, ISL_AUX_USAGE_HIZ, - level, true); + iris_blorp_surf_for_resource(&ice->vtbl, &surf, &res->base, + ISL_AUX_USAGE_HIZ, level, true); struct blorp_batch blorp_batch; blorp_batch_init(&ice->blorp, &blorp_batch, batch, diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 327a3888ed3..ec39225716c 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -170,7 +170,7 @@ __gen_combine_address(struct iris_batch *batch, void *location, #endif static uint32_t -mocs(struct iris_bo *bo) +mocs(const struct iris_bo *bo) { return bo && bo->external ? MOCS_PTE : MOCS_WB; } @@ -5903,6 +5903,7 @@ genX(init_state)(struct iris_context *ice) ice->vtbl.populate_gs_key = iris_populate_gs_key; ice->vtbl.populate_fs_key = iris_populate_fs_key; ice->vtbl.populate_cs_key = iris_populate_cs_key; + ice->vtbl.mocs = mocs; ice->state.dirty = ~0ull; -- cgit v1.2.3