From a206c4cd69a881bf3f8d960607d604b6d53e3a26 Mon Sep 17 00:00:00 2001 From: José Fonseca Date: Mon, 20 Feb 2012 20:49:03 +0000 Subject: gallivm: Fix TGSI_OPCODE_ARR's translation. Like TGSI_OPCODE_ARL, destination should be an integer. This fixes invalid LLVM IR on an internal state tracker (currently Mesa never emits this opcode). In the future consider making ADDR register also a integer-as-float array, like all other register kinds, or simply replace ADDR & ARR/ARL with integer temp and instructions. Reviewed-by: Dave Airlie --- src/gallium/auxiliary/tgsi/tgsi_info.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/gallium/auxiliary/tgsi') diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c index a44f48ca881..81df96b3c7a 100644 --- a/src/gallium/auxiliary/tgsi/tgsi_info.c +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c @@ -333,6 +333,7 @@ tgsi_opcode_infer_dst_type( uint opcode ) case TGSI_OPCODE_MOD: case TGSI_OPCODE_UARL: case TGSI_OPCODE_ARL: + case TGSI_OPCODE_ARR: case TGSI_OPCODE_IABS: case TGSI_OPCODE_ISSG: return TGSI_TYPE_SIGNED; -- cgit v1.2.3