From cfa1fb895ac5a752772f4d0748c1c2bce0c2e653 Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Mon, 16 Dec 2019 17:17:38 +0100 Subject: a6xx: Add more CP packets And add fields uncovered by looking at the firmware. I think this covers all the memory, register, and scratch manipulation opcodes that exist on A6xx, plus one additional nice find for Vulkan and describing a previously unknown opcode and documenting CP_WAIT_REG_MEM. Note that the bits for the CP_REG_TO_MEM count, as well as the formula for computing the actual count for both CP_REG_TO_MEM and CP_MEM_TO_REG, are changed because the A630 SQE firmware actually does something different. I haven't investigated older microcodes to see whether this extends back to A5xx and A4xx, but the only non-A6xx uses of this field result in the same bit-pattern when using the A6xx bit range and formula, so it should be safe to change the definition universally. Reviewed-by: Kristian H. Kristensen Reviewed-by: Rob Clark Reviewed-by: Eric Anholt Part-of: --- src/freedreno/registers/adreno_pm4.xml | 291 +++++++++++++++++++++++++++++++-- 1 file changed, 277 insertions(+), 14 deletions(-) (limited to 'src/freedreno/registers') diff --git a/src/freedreno/registers/adreno_pm4.xml b/src/freedreno/registers/adreno_pm4.xml index 3a7865b489d..533dcf0fb38 100644 --- a/src/freedreno/registers/adreno_pm4.xml +++ b/src/freedreno/registers/adreno_pm4.xml @@ -219,7 +219,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> load sequencer instruction memory (code embedded in packet) load constants from a location in memory - + selective invalidation of state pointers dynamically changes shader instruction memory partition @@ -266,7 +266,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> Load a buffer with pre-fetch enabled Set bin (?) - + test 2 memory locations to dword values specified @@ -310,7 +310,7 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> for A4xx Write to register with address that does not fit into type-0 pkt - + copy from ME scratch RAM to a register @@ -413,6 +413,15 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd"> + + + + + + + + + - + + + + + + + + + + + + + + + + + + + + + Modifies DST_REG using two sources that can either be registers + or immediates. If SRC1_ADD is set, then do the following: + + $dst = (($dst & $src0) rot $rotate) + $src1 + + Otherwise: + + $dst = (($dst & $src0) rot $rotate) | $src1 + + Here "rot" means rotate left. + + + + + + + + + + + + + + + + - - + + @@ -849,13 +909,62 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + Like CP_REG_TO_MEM, but the memory address to write to can be + offsetted using either one or two registers or scratch + registers. + + + + + + + + + + + + + + + + + + + + + + + + Like CP_REG_TO_MEM, but the memory address to write to can be + offsetted using a DWORD in memory. + + + + + + + + + + + + + + + + + + + + + + - + @@ -880,6 +989,10 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -927,7 +1095,10 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + @@ -953,6 +1124,71 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + Wait until a memory value is greater than or equal to the + reference, using signed comparison. + + + + + + + + + + + + + + + + + + + This uses the same internal comparison as CP_COND_WRITE, + but waits until the comparison is true instead. It busy-loops in + the CP for the given number of cycles before trying again. + + + + + + + + + + + + + + + + + + + + + + + + + + + + Waits for REG0 to not be 0 or REG1 to not equal REF + + + + + + + + + + + + @@ -1201,7 +1437,8 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) - + + @@ -1215,5 +1452,31 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords) + + + Executes the following DWORDs of commands if the dword at ADDR0 + is not equal to 0 and the dword at ADDR1 is less than REF + (signed comparison). + + + + + + + + + + + + + + + + + + + + + -- cgit v1.2.3