From 1443694ee5a063936afc5f273d75294ea77c0bc7 Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Sat, 16 Mar 2019 10:33:26 -0400 Subject: freedreno/ir3: enable indirect tex/samp (sam.s2en) For now it uses indirect for everything. The next step is for the ir3_cp pass to detect the case that tex and samp idx are immediate and convert the sam instruction back to the non .s2en variant. But doing that in a following patch so we can shake out the bugs with .s2en more easily. Signed-off-by: Rob Clark --- src/freedreno/ir3/ir3.h | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'src/freedreno/ir3/ir3.h') diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index 8fde504196a..245320fe2fd 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -1332,18 +1332,16 @@ INSTR1(DSY) static inline struct ir3_instruction * ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, - unsigned wrmask, unsigned flags, unsigned samp, unsigned tex, + unsigned wrmask, unsigned flags, struct ir3_instruction *samp_tex, struct ir3_instruction *src0, struct ir3_instruction *src1) { struct ir3_instruction *sam; struct ir3_register *reg; sam = ir3_instr_create(block, opc); - sam->flags |= flags; + sam->flags |= flags | IR3_INSTR_S2EN; ir3_reg_create(sam, 0, 0)->wrmask = wrmask; - // temporary step, extra dummy src which will become the - // hvec2(samp, tex) argument: - ir3_reg_create(sam, 0, 0); + __ssa_src(sam, samp_tex, IR3_REG_HALF); if (src0) { reg = ir3_reg_create(sam, 0, IR3_REG_SSA); reg->wrmask = (1 << (src0->regs_count - 1)) - 1; @@ -1354,8 +1352,6 @@ ir3_SAM(struct ir3_block *block, opc_t opc, type_t type, reg->instr = src1; reg->wrmask = (1 << (src1->regs_count - 1)) - 1; } - sam->cat5.samp = samp; - sam->cat5.tex = tex; sam->cat5.type = type; return sam; -- cgit v1.2.3