From 82c31f3eb957a0089773db47a4aca8bf3eb4a29e Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Mon, 17 Oct 2016 17:55:18 -0700 Subject: glsl: Add a lowering pass for 64-bit integer division Signed-off-by: Ian Romanick Reviewed-by: Matt Turner --- src/compiler/glsl/ir_optimization.h | 1 + src/compiler/glsl/lower_int64.cpp | 11 +++++++++++ 2 files changed, 12 insertions(+) (limited to 'src/compiler/glsl') diff --git a/src/compiler/glsl/ir_optimization.h b/src/compiler/glsl/ir_optimization.h index e4f78f038fd..3f0ef7d280c 100644 --- a/src/compiler/glsl/ir_optimization.h +++ b/src/compiler/glsl/ir_optimization.h @@ -53,6 +53,7 @@ /* Opertaions for lower_64bit_integer_instructions() */ #define MUL64 (1U << 0) #define SIGN64 (1U << 1) +#define DIV64 (1U << 2) /** * \see class lower_packing_builtins_visitor diff --git a/src/compiler/glsl/lower_int64.cpp b/src/compiler/glsl/lower_int64.cpp index a12eba85c58..a0b5e1809a5 100644 --- a/src/compiler/glsl/lower_int64.cpp +++ b/src/compiler/glsl/lower_int64.cpp @@ -368,6 +368,17 @@ lower_64bit_visitor::handle_rvalue(ir_rvalue **rvalue) } break; + case ir_binop_div: + if (lowering(DIV64)) { + if (ir->type->base_type == GLSL_TYPE_UINT64) { + *rvalue = handle_op(ir, "__builtin_udiv64", generate_ir::udiv64); + } else { + *rvalue = handle_op(ir, "__builtin_idiv64", generate_ir::idiv64); + } + this->progress = true; + } + break; + case ir_binop_mul: if (lowering(MUL64)) { *rvalue = handle_op(ir, "__builtin_umul64", generate_ir::umul64); -- cgit v1.2.3