From c3a504f470b8116ebcd892ce1f48125549817467 Mon Sep 17 00:00:00 2001
From: Eric Anholt <eric@anholt.net>
Date: Mon, 19 Mar 2018 11:30:27 -0700
Subject: broadcom/vc5: Add a QPU helper for instructions using the TLB.

This will be used for detecting last thread segment in register spilling.
---
 src/broadcom/qpu/qpu_instr.c | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

(limited to 'src/broadcom/qpu/qpu_instr.c')

diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c
index 978d470cc64..213a0826a59 100644
--- a/src/broadcom/qpu/qpu_instr.c
+++ b/src/broadcom/qpu/qpu_instr.c
@@ -568,6 +568,28 @@ v3d_qpu_add_op_writes_vpm(enum  v3d_qpu_add_op op)
         }
 }
 
+bool
+v3d_qpu_uses_tlb(const struct v3d_qpu_instr *inst)
+{
+        if (inst->sig.ldtlb ||
+            inst->sig.ldtlbu)
+                return true;
+
+        if (inst->type == V3D_QPU_INSTR_TYPE_ALU) {
+                if (inst->alu.add.magic_write &&
+                    v3d_qpu_magic_waddr_is_tlb(inst->alu.add.waddr)) {
+                        return true;
+                }
+
+                if (inst->alu.mul.magic_write &&
+                    v3d_qpu_magic_waddr_is_tlb(inst->alu.mul.waddr)) {
+                        return true;
+                }
+        }
+
+        return false;
+}
+
 bool
 v3d_qpu_writes_tmu(const struct v3d_qpu_instr *inst)
 {
-- 
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