From a7b6a869a78724c55a6699969fe1d776713ae7ec Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 2 Jul 2019 14:50:28 +0200 Subject: radv: only allocate a 32-bit value for the TC-compat range metadata Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_image.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/amd') diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index eeccce0d82f..dc598d9eecf 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -990,8 +990,8 @@ radv_image_alloc_htile(struct radv_image *image) * have to be fixed by updating ZRANGE_PRECISION when doing * fast depth clears to 0.0f. */ - image->tc_compat_zrange_offset = image->clear_value_offset + 8; - image->size = image->clear_value_offset + 16; + image->tc_compat_zrange_offset = image->size; + image->size = image->tc_compat_zrange_offset + 4; } image->alignment = align64(image->alignment, image->planes[0].surface.htile_alignment); } -- cgit v1.2.3