From 884d27bcf688d36c3bbe01bceca525595add3b33 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 19 Mar 2018 11:48:11 -0700 Subject: nir: Rename image intrinsics to image_var Generated with git grep -l nir_intrinsic_image | xargs \ sed -i 's/nir_intrinsic_image/nir_intrinsic_image_var/g' and some manual fixing in nir_intrinsics.h Reviewed-by: Timothy Arceri --- src/amd/common/ac_nir_to_llvm.c | 42 +++++++++++++++++------------------ src/amd/vulkan/radv_meta_bufimage.c | 8 +++---- src/amd/vulkan/radv_meta_fast_clear.c | 2 +- src/amd/vulkan/radv_meta_resolve_cs.c | 2 +- src/amd/vulkan/radv_shader_info.c | 40 ++++++++++++++++----------------- 5 files changed, 47 insertions(+), 47 deletions(-) (limited to 'src/amd') diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index d23f4fc1e8b..b7d29ef0b53 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2246,35 +2246,35 @@ static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx, bool is_unsigned = glsl_get_sampler_result_type(type) == GLSL_TYPE_UINT; switch (instr->intrinsic) { - case nir_intrinsic_image_atomic_add: + case nir_intrinsic_image_var_atomic_add: atomic_name = "add"; break; - case nir_intrinsic_image_atomic_min: + case nir_intrinsic_image_var_atomic_min: atomic_name = is_unsigned ? "umin" : "smin"; break; - case nir_intrinsic_image_atomic_max: + case nir_intrinsic_image_var_atomic_max: atomic_name = is_unsigned ? "umax" : "smax"; break; - case nir_intrinsic_image_atomic_and: + case nir_intrinsic_image_var_atomic_and: atomic_name = "and"; break; - case nir_intrinsic_image_atomic_or: + case nir_intrinsic_image_var_atomic_or: atomic_name = "or"; break; - case nir_intrinsic_image_atomic_xor: + case nir_intrinsic_image_var_atomic_xor: atomic_name = "xor"; break; - case nir_intrinsic_image_atomic_exchange: + case nir_intrinsic_image_var_atomic_exchange: atomic_name = "swap"; break; - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_var_atomic_comp_swap: atomic_name = "cmpswap"; break; default: abort(); } - if (instr->intrinsic == nir_intrinsic_image_atomic_comp_swap) + if (instr->intrinsic == nir_intrinsic_image_var_atomic_comp_swap) params[param_count++] = get_src(ctx, instr->src[3]); params[param_count++] = get_src(ctx, instr->src[2]); @@ -2906,26 +2906,26 @@ static void visit_intrinsic(struct ac_nir_context *ctx, case nir_intrinsic_store_shared: visit_store_shared(ctx, instr); break; - case nir_intrinsic_image_samples: + case nir_intrinsic_image_var_samples: result = visit_image_samples(ctx, instr); break; - case nir_intrinsic_image_load: + case nir_intrinsic_image_var_load: result = visit_image_load(ctx, instr); break; - case nir_intrinsic_image_store: + case nir_intrinsic_image_var_store: visit_image_store(ctx, instr); break; - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_min: - case nir_intrinsic_image_atomic_max: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: + case nir_intrinsic_image_var_atomic_add: + case nir_intrinsic_image_var_atomic_min: + case nir_intrinsic_image_var_atomic_max: + case nir_intrinsic_image_var_atomic_and: + case nir_intrinsic_image_var_atomic_or: + case nir_intrinsic_image_var_atomic_xor: + case nir_intrinsic_image_var_atomic_exchange: + case nir_intrinsic_image_var_atomic_comp_swap: result = visit_image_atomic(ctx, instr); break; - case nir_intrinsic_image_size: + case nir_intrinsic_image_var_size: result = visit_image_size(ctx, instr); break; case nir_intrinsic_shader_clock: diff --git a/src/amd/vulkan/radv_meta_bufimage.c b/src/amd/vulkan/radv_meta_bufimage.c index adf610a933e..69e15d32135 100644 --- a/src/amd/vulkan/radv_meta_bufimage.c +++ b/src/amd/vulkan/radv_meta_bufimage.c @@ -113,7 +113,7 @@ build_nir_itob_compute_shader(struct radv_device *dev, bool is_3d) nir_ssa_def *coord = nir_vec4(&b, tmp, tmp, tmp, tmp); nir_ssa_def *outval = &tex->dest.ssa; - nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store); store->src[0] = nir_src_for_ssa(coord); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[2] = nir_src_for_ssa(outval); @@ -338,7 +338,7 @@ build_nir_btoi_compute_shader(struct radv_device *dev, bool is_3d) nir_builder_instr_insert(&b, &tex->instr); nir_ssa_def *outval = &tex->dest.ssa; - nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store); store->src[0] = nir_src_for_ssa(img_coord); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[2] = nir_src_for_ssa(outval); @@ -552,7 +552,7 @@ build_nir_itoi_compute_shader(struct radv_device *dev, bool is_3d) nir_builder_instr_insert(&b, &tex->instr); nir_ssa_def *outval = &tex->dest.ssa; - nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store); store->src[0] = nir_src_for_ssa(dst_coord); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[2] = nir_src_for_ssa(outval); @@ -748,7 +748,7 @@ build_nir_cleari_compute_shader(struct radv_device *dev, bool is_3d) comps[3] = nir_imm_int(&b, 0); global_id = nir_vec(&b, comps, 4); - nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store); store->src[0] = nir_src_for_ssa(global_id); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[2] = nir_src_for_ssa(&clear_val->dest.ssa); diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index fdeeaeedbfb..affecfac742 100644 --- a/src/amd/vulkan/radv_meta_fast_clear.c +++ b/src/amd/vulkan/radv_meta_fast_clear.c @@ -90,7 +90,7 @@ build_dcc_decompress_compute_shader(struct radv_device *dev) nir_builder_instr_insert(&b, &bar->instr); nir_ssa_def *outval = &tex->dest.ssa; - nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store); store->src[0] = nir_src_for_ssa(global_id); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[2] = nir_src_for_ssa(outval); diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 519e2a5f428..ca8f826f538 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -135,7 +135,7 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s outval = radv_meta_build_resolve_srgb_conversion(&b, outval); nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa); - nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); + nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_var_store); store->src[0] = nir_src_for_ssa(coord); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); store->src[2] = nir_src_for_ssa(outval); diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 9c18791524d..47389d1b88b 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -105,17 +105,17 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr, case nir_intrinsic_vulkan_resource_index: info->desc_set_used_mask |= (1 << nir_intrinsic_desc_set(instr)); break; - case nir_intrinsic_image_load: - case nir_intrinsic_image_store: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_min: - case nir_intrinsic_image_atomic_max: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_comp_swap: - case nir_intrinsic_image_size: { + case nir_intrinsic_image_var_load: + case nir_intrinsic_image_var_store: + case nir_intrinsic_image_var_atomic_add: + case nir_intrinsic_image_var_atomic_min: + case nir_intrinsic_image_var_atomic_max: + case nir_intrinsic_image_var_atomic_and: + case nir_intrinsic_image_var_atomic_or: + case nir_intrinsic_image_var_atomic_xor: + case nir_intrinsic_image_var_atomic_exchange: + case nir_intrinsic_image_var_atomic_comp_swap: + case nir_intrinsic_image_var_size: { const struct glsl_type *type = instr->variables[0]->var->type; if(instr->variables[0]->deref.child) type = instr->variables[0]->deref.child->type; @@ -128,15 +128,15 @@ gather_intrinsic_info(const nir_shader *nir, const nir_intrinsic_instr *instr, } mark_sampler_desc(instr->variables[0]->var, info); - if (nir_intrinsic_image_store || - nir_intrinsic_image_atomic_add || - nir_intrinsic_image_atomic_min || - nir_intrinsic_image_atomic_max || - nir_intrinsic_image_atomic_and || - nir_intrinsic_image_atomic_or || - nir_intrinsic_image_atomic_xor || - nir_intrinsic_image_atomic_exchange || - nir_intrinsic_image_atomic_comp_swap) { + if (nir_intrinsic_image_var_store || + nir_intrinsic_image_var_atomic_add || + nir_intrinsic_image_var_atomic_min || + nir_intrinsic_image_var_atomic_max || + nir_intrinsic_image_var_atomic_and || + nir_intrinsic_image_var_atomic_or || + nir_intrinsic_image_var_atomic_xor || + nir_intrinsic_image_var_atomic_exchange || + nir_intrinsic_image_var_atomic_comp_swap) { if (nir->info.stage == MESA_SHADER_FRAGMENT) info->ps.writes_memory = true; } -- cgit v1.2.3