From 7b697c8b7865e9ca6be6bc445801928d7ae7169c Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Sun, 8 Oct 2017 00:41:04 +0200 Subject: amd: move r600d_common.h into r600g MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/amd/vulkan/radv_cmd_buffer.c | 2 +- src/amd/vulkan/radv_cs.h | 14 ++++++------- src/amd/vulkan/radv_formats.c | 29 +++++++++++++-------------- src/amd/vulkan/radv_pipeline.c | 1 - src/amd/vulkan/radv_query.c | 2 +- src/amd/vulkan/radv_shader.c | 1 - src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h | 1 - 7 files changed, 23 insertions(+), 27 deletions(-) (limited to 'src/amd/vulkan') diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index aaa2a5064ee..67e038a152d 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -3605,7 +3605,7 @@ static void write_event(struct radv_cmd_buffer *cmd_buffer, cmd_buffer->state.predicating, cmd_buffer->device->physical_device->rad_info.chip_class, false, - EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0, + V_028A90_BOTTOM_OF_PIPE_TS, 0, 1, va, 2, value); assert(cmd_buffer->cs->cdw <= cdw_max); diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h index 0990270f5c6..840597686a8 100644 --- a/src/amd/vulkan/radv_cs.h +++ b/src/amd/vulkan/radv_cs.h @@ -28,7 +28,7 @@ #include #include #include -#include "r600d_common.h" +#include "sid.h" static inline unsigned radeon_check_space(struct radeon_winsys *ws, struct radeon_winsys_cs *cs, @@ -41,11 +41,11 @@ static inline unsigned radeon_check_space(struct radeon_winsys *ws, static inline void radeon_set_config_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { - assert(reg < R600_CONTEXT_REG_OFFSET); + assert(reg < SI_CONTEXT_REG_OFFSET); assert(cs->cdw + 2 + num <= cs->max_dw); assert(num); radeon_emit(cs, PKT3(PKT3_SET_CONFIG_REG, num, 0)); - radeon_emit(cs, (reg - R600_CONFIG_REG_OFFSET) >> 2); + radeon_emit(cs, (reg - SI_CONFIG_REG_OFFSET) >> 2); } static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) @@ -56,11 +56,11 @@ static inline void radeon_set_config_reg(struct radeon_winsys_cs *cs, unsigned r static inline void radeon_set_context_reg_seq(struct radeon_winsys_cs *cs, unsigned reg, unsigned num) { - assert(reg >= R600_CONTEXT_REG_OFFSET); + assert(reg >= SI_CONTEXT_REG_OFFSET); assert(cs->cdw + 2 + num <= cs->max_dw); assert(num); radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, num, 0)); - radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2); + radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2); } static inline void radeon_set_context_reg(struct radeon_winsys_cs *cs, unsigned reg, unsigned value) @@ -74,10 +74,10 @@ static inline void radeon_set_context_reg_idx(struct radeon_winsys_cs *cs, unsigned reg, unsigned idx, unsigned value) { - assert(reg >= R600_CONTEXT_REG_OFFSET); + assert(reg >= SI_CONTEXT_REG_OFFSET); assert(cs->cdw + 3 <= cs->max_dw); radeon_emit(cs, PKT3(PKT3_SET_CONTEXT_REG, 1, 0)); - radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28)); + radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2 | (idx << 28)); radeon_emit(cs, value); } diff --git a/src/amd/vulkan/radv_formats.c b/src/amd/vulkan/radv_formats.c index 24445412813..88305abd044 100644 --- a/src/amd/vulkan/radv_formats.c +++ b/src/amd/vulkan/radv_formats.c @@ -26,7 +26,6 @@ #include "vk_format.h" #include "sid.h" -#include "r600d_common.h" #include "vk_util.h" @@ -767,7 +766,7 @@ unsigned radv_translate_colorswap(VkFormat format, bool do_endian_swap) #define HAS_SWIZZLE(chan,swz) (desc->swizzle[chan] == VK_SWIZZLE_##swz) if (format == VK_FORMAT_B10G11R11_UFLOAT_PACK32) - return V_0280A0_SWAP_STD; + return V_028C70_SWAP_STD; if (desc->layout != VK_FORMAT_LAYOUT_PLAIN) return ~0U; @@ -775,45 +774,45 @@ unsigned radv_translate_colorswap(VkFormat format, bool do_endian_swap) switch (desc->nr_channels) { case 1: if (HAS_SWIZZLE(0,X)) - return V_0280A0_SWAP_STD; /* X___ */ + return V_028C70_SWAP_STD; /* X___ */ else if (HAS_SWIZZLE(3,X)) - return V_0280A0_SWAP_ALT_REV; /* ___X */ + return V_028C70_SWAP_ALT_REV; /* ___X */ break; case 2: if ((HAS_SWIZZLE(0,X) && HAS_SWIZZLE(1,Y)) || (HAS_SWIZZLE(0,X) && HAS_SWIZZLE(1,NONE)) || (HAS_SWIZZLE(0,NONE) && HAS_SWIZZLE(1,Y))) - return V_0280A0_SWAP_STD; /* XY__ */ + return V_028C70_SWAP_STD; /* XY__ */ else if ((HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(1,X)) || (HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(1,NONE)) || (HAS_SWIZZLE(0,NONE) && HAS_SWIZZLE(1,X))) /* YX__ */ - return (do_endian_swap ? V_0280A0_SWAP_STD : V_0280A0_SWAP_STD_REV); + return (do_endian_swap ? V_028C70_SWAP_STD : V_028C70_SWAP_STD_REV); else if (HAS_SWIZZLE(0,X) && HAS_SWIZZLE(3,Y)) - return V_0280A0_SWAP_ALT; /* X__Y */ + return V_028C70_SWAP_ALT; /* X__Y */ else if (HAS_SWIZZLE(0,Y) && HAS_SWIZZLE(3,X)) - return V_0280A0_SWAP_ALT_REV; /* Y__X */ + return V_028C70_SWAP_ALT_REV; /* Y__X */ break; case 3: if (HAS_SWIZZLE(0,X)) - return (do_endian_swap ? V_0280A0_SWAP_STD_REV : V_0280A0_SWAP_STD); + return (do_endian_swap ? V_028C70_SWAP_STD_REV : V_028C70_SWAP_STD); else if (HAS_SWIZZLE(0,Z)) - return V_0280A0_SWAP_STD_REV; /* ZYX */ + return V_028C70_SWAP_STD_REV; /* ZYX */ break; case 4: /* check the middle channels, the 1st and 4th channel can be NONE */ if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,Z)) { - return V_0280A0_SWAP_STD; /* XYZW */ + return V_028C70_SWAP_STD; /* XYZW */ } else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,Y)) { - return V_0280A0_SWAP_STD_REV; /* WZYX */ + return V_028C70_SWAP_STD_REV; /* WZYX */ } else if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,X)) { - return V_0280A0_SWAP_ALT; /* ZYXW */ + return V_028C70_SWAP_ALT; /* ZYXW */ } else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,W)) { /* YZWX */ if (desc->is_array) - return V_0280A0_SWAP_ALT_REV; + return V_028C70_SWAP_ALT_REV; else - return (do_endian_swap ? V_0280A0_SWAP_ALT : V_0280A0_SWAP_ALT_REV); + return (do_endian_swap ? V_028C70_SWAP_ALT : V_028C70_SWAP_ALT_REV); } break; } diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 37512e82dd9..0d22bbe4bc4 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -40,7 +40,6 @@ #include "sid.h" #include "gfx9d.h" -#include "r600d_common.h" #include "ac_binary.h" #include "ac_llvm_util.h" #include "ac_nir_to_llvm.h" diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index b2ef8055f48..06045d6b41b 100644 --- a/src/amd/vulkan/radv_query.c +++ b/src/amd/vulkan/radv_query.c @@ -1153,7 +1153,7 @@ void radv_CmdEndQuery( false, cmd_buffer->device->physical_device->rad_info.chip_class, false, - EVENT_TYPE_BOTTOM_OF_PIPE_TS, 0, + V_028A90_BOTTOM_OF_PIPE_TS, 0, 1, avail_va, 0, 1); break; default: diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 285f42e9377..e0944a478e1 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -39,7 +39,6 @@ #include "sid.h" #include "gfx9d.h" -#include "r600d_common.h" #include "ac_binary.h" #include "ac_llvm_util.h" #include "ac_nir_to_llvm.h" diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h index 42d89eee54d..135d4faf943 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.h @@ -32,7 +32,6 @@ #include #include #include -#include "r600d_common.h" #include #include "radv_radeon_winsys.h" -- cgit v1.2.3