From 3d4d388e3929d7948b62d90867357aecbfba5aeb Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Sat, 12 May 2018 23:50:04 +0200 Subject: radv: Fix up 2_10_10_10 alpha sign. Pre-Vega HW always interprets the alpha for this format as unsigned, so we have to implement a fixup to do the sign correctly for signed formats. v2: Improve indexing mess. CC: 18.0 18.1 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106480 Reviewed-by: Samuel Pitoiset --- src/amd/vulkan/radv_private.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/amd/vulkan/radv_private.h') diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 4805acab280..e3eed887fae 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -352,6 +352,7 @@ struct radv_pipeline_cache { struct radv_pipeline_key { uint32_t instance_rate_inputs; uint32_t instance_rate_divisors[MAX_VERTEX_ATTRIBS]; + uint64_t vertex_alpha_adjust; unsigned tess_input_vertices; uint32_t col_format; uint32_t is_int8; -- cgit v1.2.3