From ff0f17da1446e7aa965e06c04a6ad5a55d95463d Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 29 Nov 2017 14:48:32 +0100 Subject: radv: do not allocate CMASK or DCC for small surfaces MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The idea is ported from RadeonSI, but using 512x512 instead of 256x256 seems slightly better. This improves dota2 performance by +2%. Signed-off-by: Samuel Pitoiset Reviewed-by: Dave Airlie Tested-by: Dieter Nützel --- src/amd/vulkan/radv_image.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/amd/vulkan/radv_image.c') diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index b145e81f826..ee03a1dc6a9 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -806,6 +806,16 @@ radv_image_alloc_htile(struct radv_image *image) static inline bool radv_image_can_enable_dcc_or_cmask(struct radv_image *image) { + if (image->info.samples <= 1 && + image->info.width <= 512 && image->info.height <= 512) { + /* Do not enable CMASK or DCC for small surfaces where the cost + * of the eliminate pass can be higher than the benefit of fast + * clear. RadeonSI does this, but the image threshold is + * different. + */ + return false; + } + return image->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT && (image->exclusive || image->queue_family_mask == 1); } -- cgit v1.2.3