From 8b58a14ef76f6d6e6c71fff2cb5c8fa6662a1882 Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Wed, 2 May 2018 18:35:27 -0400 Subject: ac/gpu_info: add htile_cmask_support_1d_tiling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + 2 files changed, 3 insertions(+) (limited to 'src/amd/common') diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 5b72d4985bd..e2e41f0f47a 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -317,6 +317,7 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, info->has_local_buffers = info->drm_minor >= 20 && !info->has_dedicated_vram; info->kernel_flushes_hdp_before_ib = true; + info->htile_cmask_support_1d_tiling = true; info->num_render_backends = amdinfo->rb_pipes; /* The value returned by the kernel driver was wrong. */ @@ -465,6 +466,7 @@ void ac_print_gpu_info(struct radeon_info *info) printf(" has_ctx_priority = %u\n", info->has_ctx_priority); printf(" has_local_buffers = %u\n", info->has_local_buffers); printf(" kernel_flushes_hdp_before_ib = %u\n", info->kernel_flushes_hdp_before_ib); + printf(" htile_cmask_support_1d_tiling = %u\n", info->htile_cmask_support_1d_tiling); printf("Shader core info:\n"); printf(" max_shader_clock = %i\n", info->max_shader_clock); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 8a9721750a6..578c3fb7da1 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -97,6 +97,7 @@ struct radeon_info { bool has_ctx_priority; bool has_local_buffers; bool kernel_flushes_hdp_before_ib; + bool htile_cmask_support_1d_tiling; /* Shader cores. */ uint32_t r600_max_quad_pipes; /* wave size / 16 */ -- cgit v1.2.3