From 7f33e94e43a647d71a9f930cf3180e5abb529edd Mon Sep 17 00:00:00 2001 From: Marek Olšák Date: Tue, 7 Nov 2017 00:56:13 +0100 Subject: amd/addrlib: update to latest version MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This uses C++11 initializer lists. I just overwrote all Mesa files with internal addrlib and discarded hunks that we should probably keep, but I might have missed something. The code depending on ADDR_AM_BUILD is removed. We can add it back next time if needed. Acked-by: Nicolai Hähnle --- src/amd/addrlib/r800/ciaddrlib.cpp | 47 ++- src/amd/addrlib/r800/ciaddrlib.h | 38 +-- src/amd/addrlib/r800/egbaddrlib.cpp | 656 +----------------------------------- src/amd/addrlib/r800/siaddrlib.cpp | 22 +- src/amd/addrlib/r800/siaddrlib.h | 44 ++- 5 files changed, 68 insertions(+), 739 deletions(-) (limited to 'src/amd/addrlib/r800') diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp index 4f67350c82f..322dcf64ffd 100644 --- a/src/amd/addrlib/r800/ciaddrlib.cpp +++ b/src/amd/addrlib/r800/ciaddrlib.cpp @@ -35,15 +35,7 @@ #include "si_gb_reg.h" -#include "si_ci_vi_merged_enum.h" - -#if BRAHMA_BUILD -#include "amdgpu_id.h" -#else -#include "ci_id.h" -#include "kv_id.h" -#include "vi_id.h" -#endif +#include "amdgpu_asic_addr.h" //////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -188,7 +180,6 @@ CiLib::CiLib(const Client* pClient) m_allowNonDispThickModes(FALSE) { m_class = CI_ADDRLIB; - memset(&m_settings, 0, sizeof(m_settings)); } /** @@ -450,7 +441,6 @@ BOOL_32 CiLib::HwlInitGlobalParams( // read the correct pipes from tile mode table if (m_settings.isHawaii) { - // Hawaii has 16-pipe, see GFXIP_Config_Summary.xls m_pipes = 16; } else if (m_settings.isBonaire || m_settings.isSpectre) @@ -600,9 +590,9 @@ INT_32 CiLib::HwlPostCheckTileIndex( **************************************************************************************************** */ ADDR_E_RETURNCODE CiLib::HwlSetupTileCfg( - UINT_32 bpp, ///< [in] Bits per pixel - INT_32 index, ///< [in] Tile index - INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) + UINT_32 bpp, ///< Bits per pixel + INT_32 index, ///< Tile index + INT_32 macroModeIndex, ///< Index in macro tile mode table(CI) ADDR_TILEINFO* pInfo, ///< [out] Tile Info AddrTileMode* pMode, ///< [out] Tile mode AddrTileType* pType ///< [out] Tile type @@ -711,13 +701,12 @@ ADDR_E_RETURNCODE CiLib::HwlComputeSurfaceInfo( ADDR_E_RETURNCODE retCode = SiLib::HwlComputeSurfaceInfo(pIn, pOut); - if ((pIn->mipLevel > 0) && (pOut->tcCompatible == TRUE) && (pOut->tileMode != pIn->tileMode) && (m_settings.isVolcanicIslands == TRUE)) { - CheckTcCompatibility(pOut->pTileInfo, pIn->bpp, pOut->tileMode, pOut->tileType, pOut); + pOut->tcCompatible = CheckTcCompatibility(pOut->pTileInfo, pIn->bpp, pOut->tileMode, pOut->tileType, pOut); } if (pOut->macroModeIndex == TileIndexNoMacroIndex) @@ -1572,7 +1561,7 @@ VOID CiLib::HwlSetupTileInfo( if (flags.tcCompatible) { - CheckTcCompatibility(pTileInfo, bpp, tileMode, inTileType, pOut); + flags.tcCompatible = CheckTcCompatibility(pTileInfo, bpp, tileMode, inTileType, pOut); } pOut->tcCompatible = flags.tcCompatible; @@ -2271,19 +2260,21 @@ BOOL_32 CiLib::DepthStencilTileCfgMatch( * CiLib::DepthStencilTileCfgMatch * * @brief -* Turn off TcCompatible if requirement is not met +* Check if tc compatibility is available * @return -* N/A +* If tc compatibility is not available **************************************************************************************************** */ -VOID CiLib::CheckTcCompatibility( - const ADDR_TILEINFO* pTileInfo, ///< [in] input tile info - UINT_32 bpp, ///< [in] Bits per pixel - AddrTileMode tileMode, ///< [in] input tile mode - AddrTileType tileType, ///< [in] input tile type - ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] out structure +BOOL_32 CiLib::CheckTcCompatibility( + const ADDR_TILEINFO* pTileInfo, ///< [in] input tile info + UINT_32 bpp, ///< [in] Bits per pixel + AddrTileMode tileMode, ///< [in] input tile mode + AddrTileType tileType, ///< [in] input tile type + const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in] output surf info ) const { + BOOL_32 tcCompatible = TRUE; + if (IsMacroTiled(tileMode)) { if (tileType != ADDR_DEPTH_SAMPLE_ORDER) @@ -2309,7 +2300,7 @@ VOID CiLib::CheckTcCompatibility( if (m_rowSize < colorTileSplit) { - pOut->tcCompatible = FALSE; + tcCompatible = FALSE; } } } @@ -2317,8 +2308,10 @@ VOID CiLib::CheckTcCompatibility( else { // Client should not enable tc compatible for linear and 1D tile modes. - pOut->tcCompatible = FALSE; + tcCompatible = FALSE; } + + return tcCompatible; } } // V1 diff --git a/src/amd/addrlib/r800/ciaddrlib.h b/src/amd/addrlib/r800/ciaddrlib.h index 3c838dfc53c..c11b678574f 100644 --- a/src/amd/addrlib/r800/ciaddrlib.h +++ b/src/amd/addrlib/r800/ciaddrlib.h @@ -42,37 +42,6 @@ namespace Addr namespace V1 { -/** -**************************************************************************************************** -* @brief CI specific settings structure. -**************************************************************************************************** -*/ -struct CIChipSettings -{ - struct - { - UINT_32 isSeaIsland : 1; - UINT_32 isBonaire : 1; - UINT_32 isKaveri : 1; - UINT_32 isSpectre : 1; - UINT_32 isSpooky : 1; - UINT_32 isKalindi : 1; - // Hawaii is GFXIP 7.2 - UINT_32 isHawaii : 1; - - // VI - UINT_32 isVolcanicIslands : 1; - UINT_32 isIceland : 1; - UINT_32 isTonga : 1; - UINT_32 isFiji : 1; - UINT_32 isPolaris10 : 1; - UINT_32 isPolaris11 : 1; - UINT_32 isPolaris12 : 1; - // VI fusion (Carrizo) - UINT_32 isCarrizo : 1; - }; -}; - /** **************************************************************************************************** * @brief This class is the CI specific address library @@ -208,9 +177,8 @@ private: const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; - VOID CheckTcCompatibility( - const ADDR_TILEINFO* pTileInfo, UINT_32 bpp, AddrTileMode tileMode, - AddrTileType tileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; + BOOL_32 CheckTcCompatibility(const ADDR_TILEINFO* pTileInfo, UINT_32 bpp, AddrTileMode tileMode, + AddrTileType tileType, const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; static const UINT_32 MacroTileTableSize = 16; static const UINT_32 PrtMacroModeOffset = MacroTileTableSize / 2; @@ -221,8 +189,6 @@ private: ADDR_TILEINFO m_macroTileTable[MacroTileTableSize]; UINT_32 m_noOfMacroEntries; BOOL_32 m_allowNonDispThickModes; - - CIChipSettings m_settings; }; } // V1 diff --git a/src/amd/addrlib/r800/egbaddrlib.cpp b/src/amd/addrlib/r800/egbaddrlib.cpp index 7affdecbf02..99aa6cf4cdb 100644 --- a/src/amd/addrlib/r800/egbaddrlib.cpp +++ b/src/amd/addrlib/r800/egbaddrlib.cpp @@ -739,13 +739,12 @@ BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMicroTiled( AdjustPitchAlignment(flags, pPitchAlign); - // ECR#393489 - // Workaround 2 for 1D tiling - There is HW bug for Carrizo + // Workaround 2 for 1D tiling - There is HW bug for Carrizo, // where it requires the following alignments for 1D tiling. if (flags.czDispCompatible && (mipLevel == 0)) { *pBaseAlign = PowTwoAlign(*pBaseAlign, 4096); //Base address MOD 4096 = 0 - *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 + *pPitchAlign = PowTwoAlign(*pPitchAlign, 512 / (BITS_TO_BYTES(bpp))); //(8 lines * pitch * bytes per pixel) MOD 4096 = 0 } // end Carrizo workaround for 1D tilling @@ -1091,6 +1090,8 @@ AddrTileMode EgBasedLib::ComputeSurfaceMipLevelTileMode( ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure ) const { + UINT_64 bytesPerSlice; + (void)bytesPerSlice; UINT_32 bytesPerTile; AddrTileMode expTileMode = baseTileMode; @@ -1100,6 +1101,7 @@ AddrTileMode EgBasedLib::ComputeSurfaceMipLevelTileMode( // // Compute the size of a slice. // + bytesPerSlice = BITS_TO_BYTES(static_cast(pitch) * height * bpp * numSamples); bytesPerTile = BITS_TO_BYTES(MicroTilePixels * microTileThickness * NextPow2(bpp) * numSamples); // @@ -1329,12 +1331,6 @@ UINT_64 EgBasedLib::DispatchComputeSurfaceAddrFromCoord( UINT_32* pBitPosition = &pOut->bitPosition; UINT_64 addr; -#if ADDR_AM_BUILD - UINT_32 addr5Bit = 0; - UINT_32 addr5Swizzle = pIn->addr5Swizzle; - BOOL_32 is32ByteTile = pIn->is32ByteTile; -#endif - // ADDR_DEPTH_SAMPLE_ORDER = non-disp + depth-sample-order if (microTileType == ADDR_DEPTH_SAMPLE_ORDER) { @@ -1439,23 +1435,6 @@ UINT_64 EgBasedLib::DispatchComputeSurfaceAddrFromCoord( break; } -#if ADDR_AM_BUILD - if (m_chipFamily >= ADDR_CHIP_FAMILY_NI) - { - if (addr5Swizzle && isDepthSampleOrder && is32ByteTile) - { - UINT_32 tx = x >> 3; - UINT_32 ty = y >> 3; - UINT_32 tileBits = ((ty&0x3) << 2) | (tx&0x3); - - tileBits = tileBits & addr5Swizzle; - addr5Bit = XorReduce(tileBits, 4); - - addr = addr | static_cast(addr5Bit << 5); - } - } -#endif - return addr; } @@ -2751,6 +2730,8 @@ ADDR_E_RETURNCODE EgBasedLib::HwlComputeBaseSwizzle( { 0, 7, 14, 5, 12, 3, 10, 1, 8, 15, 6, 13, 4, 11, 2, 9 }, // ADDR_SURF_16_BANK }; + UINT_32 pipes = HwlGetPipes(pTileInfo); + (void)pipes; UINT_32 banks = pTileInfo ? pTileInfo->banks : 2; UINT_32 hwNumBanks; @@ -3379,20 +3360,6 @@ ADDR_E_RETURNCODE EgBasedLib::HwlComputeFmaskAddrFromCoord( { ADDR_E_RETURNCODE retCode = ADDR_OK; -#if ADDR_AM_BUILD - if ((pIn->x > pIn->pitch) || - (pIn->y > pIn->height) || - (pIn->numSamples > m_maxSamples) || - (pIn->sample >= m_maxSamples)) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - pOut->addr = DispatchComputeFmaskAddrFromCoord(pIn, pOut); - } -#endif - return retCode; } @@ -3412,618 +3379,9 @@ ADDR_E_RETURNCODE EgBasedLib::HwlComputeFmaskCoordFromAddr( { ADDR_E_RETURNCODE retCode = ADDR_OK; -#if ADDR_AM_BUILD - if ((pIn->bitPosition >= 8) || - (pIn->numSamples > m_maxSamples)) - { - retCode = ADDR_INVALIDPARAMS; - } - else - { - DispatchComputeFmaskCoordFromAddr(pIn, pOut); - } -#endif - return retCode; } -#if ADDR_AM_BUILD -/** -**************************************************************************************************** -* EgBasedLib::DispatchComputeFmaskAddrFromCoord -* -* @brief -* Computes the FMASK address and bit position from a coordinate. -* @return -* The byte address -**************************************************************************************************** -*/ -UINT_64 EgBasedLib::DispatchComputeFmaskAddrFromCoord( - const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut ///< [out] output structure - ) const -{ - UINT_32 x = pIn->x; - UINT_32 y = pIn->y; - UINT_32 slice = pIn->slice; - UINT_32 sample = pIn->sample; - UINT_32 plane = pIn->plane; - UINT_32 pitch = pIn->pitch; - UINT_32 height = pIn->height; - UINT_32 numSamples = pIn->numSamples; - AddrTileMode tileMode = pIn->tileMode; - BOOL_32 ignoreSE = pIn->ignoreSE; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - BOOL_32 resolved = pIn->resolved; - - UINT_32* pBitPosition = &pOut->bitPosition; - UINT_64 addr = 0; - - ADDR_ASSERT(numSamples > 1); - ADDR_ASSERT(Thickness(tileMode) == 1); - - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - addr = ComputeFmaskAddrFromCoordMicroTiled(x, - y, - slice, - sample, - plane, - pitch, - height, - numSamples, - tileMode, - resolved, - pBitPosition); - break; - case ADDR_TM_2D_TILED_THIN1: //fall through - case ADDR_TM_3D_TILED_THIN1: - UINT_32 pipeSwizzle; - UINT_32 bankSwizzle; - - if (m_configFlags.useCombinedSwizzle) - { - ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, - &bankSwizzle, &pipeSwizzle); - } - else - { - pipeSwizzle = pIn->pipeSwizzle; - bankSwizzle = pIn->bankSwizzle; - } - - addr = ComputeFmaskAddrFromCoordMacroTiled(x, - y, - slice, - sample, - plane, - pitch, - height, - numSamples, - tileMode, - pipeSwizzle, - bankSwizzle, - ignoreSE, - pTileInfo, - resolved, - pBitPosition); - break; - default: - *pBitPosition = 0; - break; - } - - return addr; -} - -/** -**************************************************************************************************** -* EgBasedLib::ComputeFmaskAddrFromCoordMicroTiled -* -* @brief -* Computes the FMASK address and bit position from a coordinate for 1D tilied (micro -* tiled) -* @return -* The byte address -**************************************************************************************************** -*/ -UINT_64 EgBasedLib::ComputeFmaskAddrFromCoordMicroTiled( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 sample, ///< [in] sample number - UINT_32 plane, ///< [in] plane number - UINT_32 pitch, ///< [in] surface pitch in pixels - UINT_32 height, ///< [in] surface height in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - BOOL_32 resolved, ///< [in] TRUE if this is for resolved fmask - UINT_32* pBitPosition ///< [out] pointer to returned bit position - ) const -{ - UINT_64 addr = 0; - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // - // 2xAA use the same layout as 4xAA - // - if (numSamples == 2) - { - numSamples = 4; - } - - // - // Compute the number of planes. - // - if (resolved == FALSE) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMicroTiled(x, - y, - slice, - plane, // sample - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE, - FALSE, - pBitPosition); - - // - // Compute the real bit position. Each (sample, plane) is stored with one bit per sample. - // - - // - // Compute the pixel index with in the micro tile - // - UINT_32 pixelIndex = ComputePixelIndexWithinMicroTile(x % 8, - y % 8, - slice, - 1, - tileMode, - ADDR_NON_DISPLAYABLE); - - *pBitPosition = ((pixelIndex * numSamples) + sample) & (BITS_PER_BYTE-1); - - UINT_64 bitAddr = BYTES_TO_BITS(addr) + *pBitPosition; - - addr = bitAddr / 8; - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMicroTiled(x, - y, - slice, - sample, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE, - TRUE, - pBitPosition); - } - - return addr; -} - -/** -**************************************************************************************************** -* EgBasedLib::ComputeFmaskAddrFromCoordMacroTiled -* -* @brief -* Computes the FMASK address and bit position from a coordinate for 2D tilied (macro -* tiled) -* @return -* The byte address -**************************************************************************************************** -*/ -UINT_64 EgBasedLib::ComputeFmaskAddrFromCoordMacroTiled( - UINT_32 x, ///< [in] x coordinate - UINT_32 y, ///< [in] y coordinate - UINT_32 slice, ///< [in] slice index - UINT_32 sample, ///< [in] sample number - UINT_32 plane, ///< [in] plane number - UINT_32 pitch, ///< [in] surface pitch in pixels - UINT_32 height, ///< [in] surface height in pixels - UINT_32 numSamples, ///< [in] number of samples - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 pipeSwizzle, ///< [in] pipe swizzle - UINT_32 bankSwizzle, ///< [in] bank swizzle - BOOL_32 ignoreSE, ///< [in] TRUE if ignore shader engine - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure.**All fields to be valid on entry** - BOOL_32 resolved, ///< [in] TRUE if this is for resolved fmask - UINT_32* pBitPosition ///< [out] pointer to returned bit position - ) const -{ - UINT_64 addr = 0; - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // - // 2xAA use the same layout as 4xAA - // - if (numSamples == 2) - { - numSamples = 4; - } - - // - // Compute the number of planes. - // - if (resolved == FALSE) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMacroTiled(x, - y, - slice, - plane, // sample - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE,// isdisp - ignoreSE,// ignore_shader - FALSE,// depth_sample_order - pipeSwizzle, - bankSwizzle, - pTileInfo, - pBitPosition); - - // - // Compute the real bit position. Each (sample, plane) is stored with one bit per sample. - // - - - // - // Compute the pixel index with in the micro tile - // - UINT_32 pixelIndex = ComputePixelIndexWithinMicroTile(x , - y , - slice, - effectiveBpp, - tileMode, - ADDR_NON_DISPLAYABLE); - - *pBitPosition = ((pixelIndex * numSamples) + sample) & (BITS_PER_BYTE-1); - - UINT_64 bitAddr = BYTES_TO_BITS(addr) + *pBitPosition; - - addr = bitAddr / 8; - - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - // - // Compute the address just like a color surface with numSamples bits per element and - // numPlanes samples. - // - addr = ComputeSurfaceAddrFromCoordMacroTiled(x, - y, - slice, - sample, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - ADDR_NON_DISPLAYABLE, - ignoreSE, - TRUE, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pBitPosition); - } - - return addr; -} - -/** -**************************************************************************************************** -* EgBasedLib::ComputeFmaskCoordFromAddrMicroTiled -* -* @brief -* Compute (x,y,slice,sample,plane) coordinates from fmask address -* @return -* N/A -* -**************************************************************************************************** -*/ -VOID EgBasedLib::ComputeFmaskCoordFromAddrMicroTiled( - UINT_64 addr, ///< [in] byte address - UINT_32 bitPosition,///< [in] bit position - UINT_32 pitch, ///< [in] pitch in pixels - UINT_32 height, ///< [in] height in pixels - UINT_32 numSamples, ///< [in] number of samples (of color buffer) - AddrTileMode tileMode, ///< [in] tile mode - BOOL_32 resolved, ///< [in] TRUE if it is resolved fmask - UINT_32* pX, ///< [out] X coord - UINT_32* pY, ///< [out] Y coord - UINT_32* pSlice, ///< [out] slice index - UINT_32* pSample, ///< [out] sample index - UINT_32* pPlane ///< [out] plane index - ) const -{ - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // 2xAA use the same layout as 4xAA - if (numSamples == 2) - { - numSamples = 4; - } - - if (resolved == FALSE) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - ComputeSurfaceCoordFromAddrMicroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // tileBase - 0, // compBits - pX, - pY, - pSlice, - pPlane, - ADDR_NON_DISPLAYABLE, // microTileType - FALSE // isDepthSampleOrder - ); - - - if ( pSample ) - { - *pSample = bitPosition % numSamples; - } - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - ComputeSurfaceCoordFromAddrMicroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // tileBase - 0, // compBits - pX, - pY, - pSlice, - pSample, - ADDR_NON_DISPLAYABLE, // microTileType - TRUE // isDepthSampleOrder - ); - } -} - -/** -**************************************************************************************************** -* EgBasedLib::ComputeFmaskCoordFromAddrMacroTiled -* -* @brief -* Compute (x,y,slice,sample,plane) coordinates from -* fmask address -* @return -* N/A -* -**************************************************************************************************** -*/ -VOID EgBasedLib::ComputeFmaskCoordFromAddrMacroTiled( - UINT_64 addr, ///< [in] byte address - UINT_32 bitPosition,///< [in] bit position - UINT_32 pitch, ///< [in] pitch in pixels - UINT_32 height, ///< [in] height in pixels - UINT_32 numSamples, ///< [in] number of samples (of color buffer) - AddrTileMode tileMode, ///< [in] tile mode - UINT_32 pipeSwizzle,///< [in] pipe swizzle - UINT_32 bankSwizzle,///< [in] bank swizzle - BOOL_32 ignoreSE, ///< [in] TRUE if ignore shader engine - ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** - BOOL_32 resolved, ///< [in] TRUE if it is resolved fmask - UINT_32* pX, ///< [out] X coord - UINT_32* pY, ///< [out] Y coord - UINT_32* pSlice, ///< [out] slice index - UINT_32* pSample, ///< [out] sample index - UINT_32* pPlane ///< [out] plane index - ) const -{ - UINT_32 effectiveBpp; - UINT_32 effectiveSamples; - - // 2xAA use the same layout as 4xAA - if (numSamples == 2) - { - numSamples = 4; - } - - // - // Compute the number of planes. - // - if (resolved == FALSE) - { - effectiveSamples = ComputeFmaskNumPlanesFromNumSamples(numSamples); - effectiveBpp = numSamples; - - ComputeSurfaceCoordFromAddrMacroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // No tileBase - 0, // No compBits - ADDR_NON_DISPLAYABLE, - ignoreSE, - FALSE, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pX, - pY, - pSlice, - pPlane); - - if (pSample) - { - *pSample = bitPosition % numSamples; - } - } - else - { - effectiveBpp = ComputeFmaskResolvedBppFromNumSamples(numSamples); - effectiveSamples = 1; - - ComputeSurfaceCoordFromAddrMacroTiled(addr, - bitPosition, - effectiveBpp, - pitch, - height, - effectiveSamples, - tileMode, - 0, // No tileBase - 0, // No compBits - ADDR_NON_DISPLAYABLE, - ignoreSE, - TRUE, - pipeSwizzle, - bankSwizzle, - pTileInfo, - pX, - pY, - pSlice, - pSample); - } -} - -/** -**************************************************************************************************** -* EgBasedLib::DispatchComputeFmaskCoordFromAddr -* -* @brief -* Compute (x,y,slice,sample,plane) coordinates from -* fmask address -* @return -* N/A -* -**************************************************************************************************** -*/ -VOID EgBasedLib::DispatchComputeFmaskCoordFromAddr( - const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, ///< [in] input structure - ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut ///< [out] output structure - ) const -{ - UINT_64 addr = pIn->addr; - UINT_32 bitPosition = pIn->bitPosition; - UINT_32 pitch = pIn->pitch; - UINT_32 height = pIn->height; - UINT_32 numSamples = pIn->numSamples; - AddrTileMode tileMode = pIn->tileMode; - BOOL_32 ignoreSE = pIn->ignoreSE; - ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; - BOOL_32 resolved = pIn->resolved; - - UINT_32* pX = &pOut->x; - UINT_32* pY = &pOut->y; - UINT_32* pSlice = &pOut->slice; - UINT_32* pSample = &pOut->sample; - UINT_32* pPlane = &pOut->plane; - - switch (tileMode) - { - case ADDR_TM_1D_TILED_THIN1: - ComputeFmaskCoordFromAddrMicroTiled(addr, - bitPosition, - pitch, - height, - numSamples, - tileMode, - resolved, - pX, - pY, - pSlice, - pSample, - pPlane); - break; - case ADDR_TM_2D_TILED_THIN1://fall through - case ADDR_TM_3D_TILED_THIN1: - UINT_32 pipeSwizzle; - UINT_32 bankSwizzle; - - if (m_configFlags.useCombinedSwizzle) - { - ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, - &bankSwizzle, &pipeSwizzle); - } - else - { - pipeSwizzle = pIn->pipeSwizzle; - bankSwizzle = pIn->bankSwizzle; - } - - ComputeFmaskCoordFromAddrMacroTiled(addr, - bitPosition, - pitch, - height, - numSamples, - tileMode, - pipeSwizzle, - bankSwizzle, - ignoreSE, - pTileInfo, - resolved, - pX, - pY, - pSlice, - pSample, - pPlane); - break; - default: - ADDR_ASSERT_ALWAYS(); - break; - - } -} -#endif - /** **************************************************************************************************** * EgBasedLib::ComputeFmaskNumPlanesFromNumSamples diff --git a/src/amd/addrlib/r800/siaddrlib.cpp b/src/amd/addrlib/r800/siaddrlib.cpp index 9ee1335b3ae..0fb5c2befdc 100644 --- a/src/amd/addrlib/r800/siaddrlib.cpp +++ b/src/amd/addrlib/r800/siaddrlib.cpp @@ -32,16 +32,9 @@ */ #include "siaddrlib.h" - #include "si_gb_reg.h" -#include "si_ci_vi_merged_enum.h" - -#if BRAHMA_BUILD -#include "amdgpu_id.h" -#else -#include "si_id.h" -#endif +#include "amdgpu_asic_addr.h" //////////////////////////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -2664,7 +2657,8 @@ ADDR_E_RETURNCODE SiLib::HwlComputeSurfaceInfo( if ((pIn->numSlices > 1) && (IsMacroTiled(pOut->tileMode) == TRUE) && - (m_chipFamily == ADDR_CHIP_FAMILY_SI)) + ((m_chipFamily == ADDR_CHIP_FAMILY_SI) || + (IsPrtTileMode(pOut->tileMode) == FALSE))) { pOut->equationIndex = ADDR_INVALID_EQUATION_INDEX; } @@ -2822,8 +2816,8 @@ VOID SiLib::HwlCheckLastMacroTiledLvl( **************************************************************************************************** */ AddrTileMode SiLib::HwlDegradeThickTileMode( - AddrTileMode baseTileMode, ///< [in] base tile mode - UINT_32 numSlices, ///< [in] current number of slices + AddrTileMode baseTileMode, ///< base tile mode + UINT_32 numSlices, ///< current number of slices UINT_32* pBytesPerTile ///< [in,out] pointer to bytes per slice ) const { @@ -2963,9 +2957,9 @@ INT_32 SiLib::HwlPostCheckTileIndex( **************************************************************************************************** */ ADDR_E_RETURNCODE SiLib::HwlSetupTileCfg( - UINT_32 bpp, ///< [in] Bits per pixel - INT_32 index, ///< [in] Tile index - INT_32 macroModeIndex, ///< [in] Index in macro tile mode table(CI) + UINT_32 bpp, ///< Bits per pixel + INT_32 index, ///< Tile index + INT_32 macroModeIndex, ///< Index in macro tile mode table(CI) ADDR_TILEINFO* pInfo, ///< [out] Tile Info AddrTileMode* pMode, ///< [out] Tile mode AddrTileType* pType ///< [out] Tile type diff --git a/src/amd/addrlib/r800/siaddrlib.h b/src/amd/addrlib/r800/siaddrlib.h index faf63fde6c5..f07fc31a57d 100644 --- a/src/amd/addrlib/r800/siaddrlib.h +++ b/src/amd/addrlib/r800/siaddrlib.h @@ -59,18 +59,36 @@ struct TileConfig * @brief SI specific settings structure. **************************************************************************************************** */ -struct SIChipSettings +struct SiChipSettings { - struct - { - UINT_32 isSouthernIsland : 1; - UINT_32 isTahiti : 1; - UINT_32 isPitCairn : 1; - UINT_32 isCapeVerde : 1; - /// Oland/Hainan are of GFXIP 6.0, similar with SI - UINT_32 isOland : 1; - UINT_32 isHainan : 1; - }; + UINT_32 isSouthernIsland : 1; + UINT_32 isTahiti : 1; + UINT_32 isPitCairn : 1; + UINT_32 isCapeVerde : 1; + // Oland/Hainan are of GFXIP 6.0, similar with SI + UINT_32 isOland : 1; + UINT_32 isHainan : 1; + + // CI + UINT_32 isSeaIsland : 1; + UINT_32 isBonaire : 1; + UINT_32 isKaveri : 1; + UINT_32 isSpectre : 1; + UINT_32 isSpooky : 1; + UINT_32 isKalindi : 1; + // Hawaii is GFXIP 7.2 + UINT_32 isHawaii : 1; + + // VI + UINT_32 isVolcanicIslands : 1; + UINT_32 isIceland : 1; + UINT_32 isTonga : 1; + UINT_32 isFiji : 1; + UINT_32 isPolaris10 : 1; + UINT_32 isPolaris11 : 1; + UINT_32 isPolaris12 : 1; + // VI fusion + UINT_32 isCarrizo : 1; }; /** @@ -312,12 +330,12 @@ protected: UINT_32 m_uncompressDepthEqIndex; + SiChipSettings m_settings; + private: VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const; BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries); - - SIChipSettings m_settings; }; } // V1 -- cgit v1.2.3