From 3bd1380ab2aea14d6187110982b8ba576eefb073 Mon Sep 17 00:00:00 2001
From: Carlos Xiong <clever.xiong@amd.com>
Date: Sun, 14 Dec 2014 22:50:15 -0500
Subject: amdgpu/addrlib: force all zero tile info for linear general.

---
 src/amd/addrlib/r800/ciaddrlib.cpp | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

(limited to 'src/amd/addrlib/r800/ciaddrlib.cpp')

diff --git a/src/amd/addrlib/r800/ciaddrlib.cpp b/src/amd/addrlib/r800/ciaddrlib.cpp
index f72f5a26935..d4f8c641b37 100644
--- a/src/amd/addrlib/r800/ciaddrlib.cpp
+++ b/src/amd/addrlib/r800/ciaddrlib.cpp
@@ -555,7 +555,16 @@ ADDR_E_RETURNCODE CiAddrLib::HwlSetupTileCfg(
     // Global flag to control usage of tileIndex
     if (UseTileIndex(index))
     {
-        if (static_cast<UINT_32>(index) >= m_noOfEntries)
+        if (index == TileIndexLinearGeneral)
+        {
+            pInfo->banks = 2;
+            pInfo->bankWidth = 1;
+            pInfo->bankHeight = 1;
+            pInfo->macroAspectRatio = 1;
+            pInfo->tileSplitBytes = 64;
+            pInfo->pipeConfig = ADDR_PIPECFG_P2;
+        }
+        else if (static_cast<UINT_32>(index) >= m_noOfEntries)
         {
             returnCode = ADDR_INVALIDPARAMS;
         }
-- 
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