From 6164f23a9140ae8dfa4d44f7a9c41228e36fa9bf Mon Sep 17 00:00:00 2001 From: XiaoYuan Zheng Date: Thu, 22 Jan 2015 05:08:05 -0500 Subject: amdgpu/addrlib: add tcCompatible htile addr from coordinate support. --- src/amd/addrlib/addrinterface.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/amd/addrlib/addrinterface.h') diff --git a/src/amd/addrlib/addrinterface.h b/src/amd/addrlib/addrinterface.h index 01d8788f4b8..079596767e2 100644 --- a/src/amd/addrlib/addrinterface.h +++ b/src/amd/addrlib/addrinterface.h @@ -851,6 +851,7 @@ typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT UINT_32 slice; ///< Index of slice UINT_32 numSlices; ///< Number of slices BOOL_32 isLinear; ///< Linear or tiled HTILE layout + ADDR_HTILE_FLAGS flags; ///< htile flags AddrHtileBlockSize blockWidth; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 AddrHtileBlockSize blockHeight; ///< 4 or 8. 1 means 8, 0 means 4. EG above only support 8 ADDR_TILEINFO* pTileInfo; ///< Tile info @@ -859,6 +860,8 @@ typedef struct _ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT /// while the global useTileIndex is set to 1 INT_32 macroModeIndex; ///< Index in macro tile mode table if there is one (CI) ///< README: When tileIndex is not -1, this must be valid + UINT_32 bpp; ///< depth/stencil buffer bit per pixel size + UINT_32 zStencilAddr; ///< tcCompatible Z/Stencil surface address } ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT; /** -- cgit v1.2.3