From 234323558dd239a4648c6c25a001c061d663fd49 Mon Sep 17 00:00:00 2001 From: Grazvydas Ignotas Date: Tue, 28 Jun 2016 01:33:21 +0300 Subject: doc: improve INTEL_DEBUG documentation Remove 'reg' option that does not actually exist, elaborate more about 'sync' and add the missing options. Signed-off-by: Grazvydas Ignotas Reviewed-by: Kenneth Graunke --- docs/envvars.html | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'docs') diff --git a/docs/envvars.html b/docs/envvars.html index ed957bd1999..2d9a2891144 100644 --- a/docs/envvars.html +++ b/docs/envvars.html @@ -144,11 +144,10 @@ See the Xlib software driver page for details.
  • bat - emit batch information
  • pix - emit messages about pixel operations
  • buf - emit messages about buffer objects
    • -
  • reg - emit messages about regions
  • fbo - emit messages about framebuffers
  • fs - dump shader assembly for fragment shaders
  • gs - dump shader assembly for geometry shaders
    • -
  • sync - emit messages about synchronization
    • +
  • sync - after sending each batch, emit a message and wait for that batch to finish rendering
  • prim - emit messages about drawing primitives
  • vert - emit messages about vertex assembly
  • dri - emit messages about the DRI interface
    • @@ -163,9 +162,18 @@ See the Xlib software driver page for details.
  • blorp - emit messages about the blorp operations (blits & clears)
  • nodualobj - suppress generation of dual-object geometry shader code
  • optimizer - dump shader assembly to files at each optimization pass and iteration that make progress
    • +
  • ann - annotate IR in assembly dumps
    • +
  • no8 - don't generate SIMD8 fragment shader
  • vec4 - force vec4 mode in vertex shader
  • spill_fs - force spilling of all registers in the scalar backend (useful to debug spilling code)
  • spill_vec4 - force spilling of all registers in the vec4 backend (useful to debug spilling code)
    • +
  • cs - dump shader assembly for compute shaders
    • +
  • hex - print instruction hex dump with the disassembly
    • +
  • nocompact - disable instruction compaction
    • +
  • tcs - dump shader assembly for tessellation control shaders
    • +
  • tes - dump shader assembly for tessellation evaluation shaders
    • +
  • l3 - emit messages about the new L3 state during transitions
    • +
  • do32 - generate compute shader SIMD32 programs even if workgroup size doesn't exceed the SIMD16 limit
  • norbc - disable single sampled render buffer compression
    • -- cgit v1.2.3