From dfe9dec04f707d61633665785600156d282d0d39 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Wed, 2 Jun 2010 17:37:42 -0600 Subject: st/mesa: fix indirect addressing of input/output regs This fixes an issue that was missed with commit 9f544394c1d059ce09c8bb2b5e11f5e871c7915f. Fixes piglit glsl-texcoord-array.shader_test --- src/mesa/state_tracker/st_mesa_to_tgsi.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index 6df6cdfe03d..35016d80e6b 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -319,10 +319,15 @@ translate_src( struct st_translate *t, if (SrcReg->RelAddr) { src = ureg_src_indirect( src, ureg_src(t->address[0])); - /* If SrcReg->Index was negative, it was set to zero in - * src_register(). Reassign it now. - */ - src.Index = SrcReg->Index; + if (SrcReg->File != PROGRAM_INPUT && + SrcReg->File != PROGRAM_OUTPUT) { + /* If SrcReg->Index was negative, it was set to zero in + * src_register(). Reassign it now. But don't do this + * for input/output regs since they get remapped while + * const buffers don't. + */ + src.Index = SrcReg->Index; + } } return src; -- cgit v1.2.3