From d683acb101a65d0688bfd0818a0ddb4be16e376d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 16 Nov 2009 15:03:48 -0500 Subject: r600: don't force Z order Let the hw decide (early vs late Z) fixes fdo bug 25092 Signed-off-by: Alex Deucher --- src/mesa/drivers/dri/r600/r700_state.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c index 41000dc8ce4..d7420678ff0 100644 --- a/src/mesa/drivers/dri/r600/r700_state.c +++ b/src/mesa/drivers/dri/r600/r700_state.c @@ -202,9 +202,6 @@ static void r700SetDBRenderState(GLcontext * ctx) SETbit(r700->DB_SHADER_CONTROL.u32All, DUAL_EXPORT_ENABLE_bit); SETfield(r700->DB_SHADER_CONTROL.u32All, EARLY_Z_THEN_LATE_Z, Z_ORDER_shift, Z_ORDER_mask); - /* XXX not sure if this is required */ - if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770) - SETbit(r700->DB_RENDER_OVERRIDE.u32All, FORCE_SHADER_Z_ORDER_bit); /* XXX need to enable htile for hiz/s */ SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIZ_ENABLE_shift, FORCE_HIZ_ENABLE_mask); SETfield(r700->DB_RENDER_OVERRIDE.u32All, FORCE_DISABLE, FORCE_HIS_ENABLE0_shift, FORCE_HIS_ENABLE0_mask); -- cgit v1.2.3