From d3a89a7c494d577fdf8f45c0d8735004a571e86b Mon Sep 17 00:00:00 2001 From: Alejandro Piñeiro Date: Fri, 4 Mar 2016 17:32:08 +0100 Subject: i965/vec4/nir: remove emit_untyped_surface_read and emit_untyped_atomic at brw_vec4_visitor surface_access emit_untyped_read and emit_untyped_atomic provides the same functionality. v2: surface parameter of emit_untyped_atomic is a const, no need to specify default predicate on emit_untyped_atomic, use retype (Francisco Jerez). Reviewed-by: Francisco Jerez --- src/mesa/drivers/dri/i965/brw_vec4.h | 7 ---- src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 36 +++++++++++------ src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 55 -------------------------- 3 files changed, 23 insertions(+), 75 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index 91771b84069..d43a5a82052 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -276,13 +276,6 @@ public: void emit_shader_time_end(); void emit_shader_time_write(int shader_time_subindex, src_reg value); - void emit_untyped_atomic(unsigned atomic_op, unsigned surf_index, - dst_reg dst, src_reg offset, src_reg src0, - src_reg src1); - - void emit_untyped_surface_read(unsigned surf_index, dst_reg dst, - src_reg offset); - src_reg get_scratch_offset(bblock_t *block, vec4_instruction *inst, src_reg *reladdr, int reg_offset); src_reg get_pull_constant_offset(bblock_t *block, vec4_instruction *inst, diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 9b721e5b8a4..0e716cf3d82 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -724,24 +724,34 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) (unsigned) instr->const_index[0]; src_reg offset = get_nir_src(instr->src[0], nir_type_int, instr->num_components); + const src_reg surface = brw_imm_ud(surf_index); + const vec4_builder bld = + vec4_builder(this).at_end().annotate(current_annotation, base_ir); + src_reg tmp; + dest = get_nir_dest(instr->dest); switch (instr->intrinsic) { - case nir_intrinsic_atomic_counter_inc: - emit_untyped_atomic(BRW_AOP_INC, surf_index, dest, offset, - src_reg(), src_reg()); - break; - case nir_intrinsic_atomic_counter_dec: - emit_untyped_atomic(BRW_AOP_PREDEC, surf_index, dest, offset, - src_reg(), src_reg()); - break; - case nir_intrinsic_atomic_counter_read: - emit_untyped_surface_read(surf_index, dest, offset); - break; - default: - unreachable("Unreachable"); + case nir_intrinsic_atomic_counter_inc: + tmp = emit_untyped_atomic(bld, surface, offset, + src_reg(), src_reg(), + 1, 1, + BRW_AOP_INC); + break; + case nir_intrinsic_atomic_counter_dec: + tmp = emit_untyped_atomic(bld, surface, offset, + src_reg(), src_reg(), + 1, 1, + BRW_AOP_PREDEC); + break; + case nir_intrinsic_atomic_counter_read: + tmp = emit_untyped_read(bld, surface, offset, 1, 1); + break; + default: + unreachable("Unreachable"); } + bld.MOV(retype(dest, tmp.type), tmp); brw_mark_surface_used(stage_prog_data, surf_index); break; } diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index cfd4d9b5d00..d30330a379f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -1114,61 +1114,6 @@ vec4_visitor::gs_end_primitive() unreachable("not reached"); } -void -vec4_visitor::emit_untyped_atomic(unsigned atomic_op, unsigned surf_index, - dst_reg dst, src_reg surf_offset, - src_reg src0, src_reg src1) -{ - unsigned mlen = 1 + (src0.file != BAD_FILE) + (src1.file != BAD_FILE); - src_reg src_payload(this, glsl_type::uint_type, mlen); - dst_reg payload(src_payload); - payload.writemask = WRITEMASK_X; - - /* Set the atomic operation offset. */ - emit(MOV(offset(payload, 0), surf_offset)); - unsigned i = 1; - - /* Set the atomic operation arguments. */ - if (src0.file != BAD_FILE) { - emit(MOV(offset(payload, i), src0)); - i++; - } - - if (src1.file != BAD_FILE) { - emit(MOV(offset(payload, i), src1)); - i++; - } - - /* Emit the instruction. Note that this maps to the normal SIMD8 - * untyped atomic message on Ivy Bridge, but that's OK because - * unused channels will be masked out. - */ - vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst, - src_payload, - brw_imm_ud(surf_index), brw_imm_ud(atomic_op)); - inst->mlen = mlen; -} - -void -vec4_visitor::emit_untyped_surface_read(unsigned surf_index, dst_reg dst, - src_reg surf_offset) -{ - dst_reg offset(this, glsl_type::uint_type); - offset.writemask = WRITEMASK_X; - - /* Set the surface read offset. */ - emit(MOV(offset, surf_offset)); - - /* Emit the instruction. Note that this maps to the normal SIMD8 - * untyped surface read message, but that's OK because unused - * channels will be masked out. - */ - vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, dst, - src_reg(offset), - brw_imm_ud(surf_index), brw_imm_d(1)); - inst->mlen = 1; -} - void vec4_visitor::emit_ndc_computation() { -- cgit v1.2.3