From d0575d98fc595dcc17706dc73d1eb461027ca17a Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sat, 14 Jun 2014 03:53:07 -0700 Subject: i965/vec4: Fix dead code elimination for VGRFs of size > 1. When faced with code such as: mov vgrf31.0:UD, 960D mov vgrf31.1:UD, vgrf30.xxxx:UD The dead code eliminator didn't consider reg_offsets, so it decided that the second instruction was writing was writing to the same register as the first one, and eliminated the first one. But they're actually different registers. This fixes INTEL_DEBUG=shader_time for vertex shaders. In the above code, vgrf31.0 represents the offset into the shader_time buffer where the data should be written, and vgrf31.1 represents the actual time data. With a completely undefined offset, results were...unexpected. I think this is probably one of the few cases (maybe only case) where we generate multiple MOVs to a large VGRF. Normally, we just use them as texturing results; the other SEND-from-GRF uses a size 1 VGRF. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79029 Signed-off-by: Kenneth Graunke Reviewed-by: Matt Turner Cc: mesa-stable@lists.freedesktop.org --- src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp index e816b94e608..ee5be56b713 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp @@ -464,7 +464,8 @@ vec4_visitor::dead_code_eliminate() } if (inst->dst.file == scan_inst->dst.file && - inst->dst.reg == scan_inst->dst.reg) { + inst->dst.reg == scan_inst->dst.reg && + inst->dst.reg_offset == scan_inst->dst.reg_offset) { int new_writemask = scan_inst->dst.writemask & ~dead_channels; progress = try_eliminate_instruction(scan_inst, new_writemask, brw) || -- cgit v1.2.3