From ca43006fd2e9af1db9fe7e6dc2fc89502df7f596 Mon Sep 17 00:00:00 2001
From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 12 Sep 2019 19:39:02 -0400
Subject: ac: move ac_get_max_wave64_per_simd into radeon_info

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 src/amd/common/ac_gpu_info.c             |  2 ++
 src/amd/common/ac_gpu_info.h             | 18 ++----------------
 src/amd/vulkan/radv_shader.c             |  2 +-
 src/gallium/drivers/radeonsi/si_shader.c |  2 +-
 4 files changed, 6 insertions(+), 18 deletions(-)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 0c6e8cbfb98..cc7cbc11ee6 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -584,6 +584,8 @@ bool ac_query_gpu_info(int fd, void *dev_p,
 		}
 	}
 
+	info->max_wave64_per_simd = info->family >= CHIP_POLARIS10 &&
+				    info->family <= CHIP_VEGAM ? 8 : 10;
 	return true;
 }
 
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 1e42a2a434b..7ab9bb11e49 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -141,6 +141,7 @@ struct radeon_info {
 	uint32_t                    num_tcc_blocks;
 	uint32_t                    max_se; /* shader engines */
 	uint32_t                    max_sh_per_se; /* shader arrays per shader engine */
+	uint32_t                    max_wave64_per_simd;
 
 	/* Render backends (color + depth blocks). */
 	uint32_t                    r300_num_gb_pipes;
@@ -189,21 +190,6 @@ unsigned ac_get_compute_resource_limits(struct radeon_info *info,
 					unsigned max_waves_per_sh,
 					unsigned threadgroups_per_cu);
 
-static inline unsigned ac_get_max_wave64_per_simd(enum radeon_family family)
-{
-
-	switch (family) {
-	/* These always have 8 waves: */
-	case CHIP_POLARIS10:
-	case CHIP_POLARIS11:
-	case CHIP_POLARIS12:
-	case CHIP_VEGAM:
-		return 8;
-	default:
-		return 10;
-	}
-}
-
 static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class,
 						 unsigned wave_size)
 {
@@ -221,7 +207,7 @@ ac_get_num_physical_sgprs(const struct radeon_info *info)
 	 * of Wave32, which is double the number for Wave64.
 	 */
 	if (info->chip_class >= GFX10)
-		return 128 * ac_get_max_wave64_per_simd(info->family) * 2;
+		return 128 * info->max_wave64_per_simd * 2;
 
 	return info->chip_class >= GFX8 ? 800 : 512;
 }
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 02a8712a972..b875b989088 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -1258,7 +1258,7 @@ radv_get_max_waves(struct radv_device *device,
 	unsigned max_simd_waves;
 	unsigned lds_per_wave = 0;
 
-	max_simd_waves = ac_get_max_wave64_per_simd(device->physical_device->rad_info.family);
+	max_simd_waves = device->physical_device->rad_info.max_wave64_per_simd;
 
 	if (stage == MESA_SHADER_FRAGMENT) {
 		lds_per_wave = conf->lds_size * lds_increment +
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index cbe393d03c7..de1ad16a34b 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5420,7 +5420,7 @@ static void si_calculate_max_simd_waves(struct si_shader *shader)
 	unsigned lds_per_wave = 0;
 	unsigned max_simd_waves;
 
-	max_simd_waves = ac_get_max_wave64_per_simd(sscreen->info.family);
+	max_simd_waves = sscreen->info.max_wave64_per_simd;
 
 	/* Compute LDS usage for PS. */
 	switch (shader->selector->type) {
-- 
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