From bede1bdb4828ea673bc7859db4058da7e35c6774 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Fri, 9 May 2014 15:55:57 +1000 Subject: nvc0: bump sched data member to 32-bits SM50 backend requires 21 bits per instruction, not 8. Signed-off-by: Ben Skeggs Reviewed-by: Ilia Mirkin --- src/gallium/drivers/nouveau/codegen/nv50_ir.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.h b/src/gallium/drivers/nouveau/codegen/nv50_ir.h index 8872cfb7025..f082f856ffc 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.h @@ -792,7 +792,7 @@ public: int8_t flagsDef; int8_t flagsSrc; - uint8_t sched; // scheduling data (NOTE: maybe move to separate storage) + uint32_t sched; // scheduling data (NOTE: maybe move to separate storage) BasicBlock *bb; -- cgit v1.2.3