From adbfc4a09a21a3a9c707833e21a712a1d3fff7bd Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Fri, 1 Jun 2012 04:19:27 -0700 Subject: i965: Implement texture buffer objects on Gen6. Commit a07cf3397e332388d3599c83e50ac45511972890 added support for TBOs on Gen7, but missed Gen6. Passes piglit -t texture_buffer and oglconform's buffermapping basic.read.texture tests. Signed-off-by: Kenneth Graunke Reviewed-by: Eric Anholt --- src/mesa/drivers/dri/i965/brw_wm_sampler_state.c | 4 ++ src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 57 ++++++++++++++++++++++++ 2 files changed, 61 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c index 9f13299f415..1c61bd0816f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c @@ -167,6 +167,10 @@ static void brw_update_sampler_state(struct brw_context *brw, struct gl_sampler_object *gl_sampler = _mesa_get_samplerobj(ctx, unit); bool using_nearest = false; + /* These don't use samplers at all. */ + if (texObj->Target == GL_TEXTURE_BUFFER) + return; + switch (gl_sampler->MinFilter) { case GL_NEAREST: sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 6e745cf71ab..471833778d2 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -644,6 +644,58 @@ brw_get_surface_num_multisamples(unsigned num_samples) } +static void +brw_update_buffer_texture_surface(struct gl_context *ctx, GLuint unit) +{ + struct brw_context *brw = brw_context(ctx); + struct intel_context *intel = &brw->intel; + struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; + const GLuint surf_index = SURF_INDEX_TEXTURE(unit); + uint32_t *surf; + struct intel_buffer_object *intel_obj = + intel_buffer_object(tObj->BufferObject); + drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; + gl_format format = tObj->_BufferObjectFormat; + uint32_t brw_format = brw_format_for_mesa_format(format); + int texel_size = _mesa_get_format_bytes(format); + + if (brw_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) { + _mesa_problem(NULL, "bad format %s for texture buffer\n", + _mesa_get_format_name(format)); + } + + surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, + 6 * 4, 32, &brw->wm.surf_offset[surf_index]); + + surf[0] = (BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT | + (brw_format_for_mesa_format(format) << BRW_SURFACE_FORMAT_SHIFT)); + + if (intel->gen >= 6) + surf[0] |= BRW_SURFACE_RC_READ_WRITE; + + if (bo) { + surf[1] = bo->offset; /* reloc */ + + /* Emit relocation to surface contents. */ + drm_intel_bo_emit_reloc(brw->intel.batch.bo, + brw->wm.surf_offset[surf_index] + 4, + bo, 0, I915_GEM_DOMAIN_SAMPLER, 0); + + int w = intel_obj->Base.Size / texel_size; + surf[2] = ((w & 0x7f) << BRW_SURFACE_WIDTH_SHIFT | + ((w >> 7) & 0x1fff) << BRW_SURFACE_HEIGHT_SHIFT); + surf[3] = (((w >> 20) & 0x7f) << BRW_SURFACE_DEPTH_SHIFT | + (texel_size - 1) << BRW_SURFACE_PITCH_SHIFT); + } else { + surf[1] = 0; + surf[2] = 0; + surf[3] = 0; + } + + surf[4] = 0; + surf[5] = 0; +} + static void brw_update_texture_surface( struct gl_context *ctx, GLuint unit ) { @@ -657,6 +709,11 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint unit ) uint32_t *surf; int width, height, depth; + if (tObj->Target == GL_TEXTURE_BUFFER) { + brw_update_buffer_texture_surface(ctx, unit); + return; + } + intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth); surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, -- cgit v1.2.3