From 70cd05d6ac533977f96aa832bbb2886172019f35 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Wed, 25 Oct 2017 09:37:09 -0700 Subject: anv: Fix assert about source attrs. Asserting slot >= 2 made sense when the URB read offset was always 1 (pair of slots). Commit 566a0c43f0b9fbf5106161471dd5061c7275f761 made it possible to read from the VUE header in slot 0, by adjusting the offset to be 0. So, this assert is now bogus. Use the one from GL. Reviewed-by: Jason Ekstrand --- src/intel/vulkan/genX_pipeline.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 326fc30dd31..7e3a785c584 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -379,8 +379,8 @@ emit_3dstate_sbe(struct anv_pipeline *pipeline) /* We have to subtract two slots to accout for the URB entry output * read offset in the VS and GS stages. */ - assert(slot >= 2); const int source_attr = slot - 2 * urb_entry_read_offset; + assert(source_attr >= 0 && source_attr < 32); max_source_attr = MAX2(max_source_attr, source_attr); swiz.Attribute[input_index].SourceAttribute = source_attr; } -- cgit v1.2.3