From 7f1ae3a94dc9ec1360ed8f6e076501423f2f60f2 Mon Sep 17 00:00:00 2001 From: Matthieu Herrb Date: Sun, 18 Apr 2010 16:55:36 -0700 Subject: mesa: Use __OpenBSD__ to check for OpenBSD. Signed-off-by: Brian Paul --- src/mesa/drivers/dri/common/xmlconfig.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/common/xmlconfig.c b/src/mesa/drivers/dri/common/xmlconfig.c index 477259ea7e0..a6d6c999a75 100644 --- a/src/mesa/drivers/dri/common/xmlconfig.c +++ b/src/mesa/drivers/dri/common/xmlconfig.c @@ -65,7 +65,7 @@ extern char *program_invocation_name, *program_invocation_short_name; #endif #if !defined(GET_PROGRAM_NAME) -# if defined(OpenBSD) || defined(NetBSD) || defined(__UCLIBC__) +# if defined(__OpenBSD__) || defined(NetBSD) || defined(__UCLIBC__) /* This is a hack. It's said to work on OpenBSD, NetBSD and GNU. * Rogelio M.Serrano Jr. reported it's also working with UCLIBC. It's * used as a last resort, if there is no documented facility available. */ -- cgit v1.2.3 From c39ab02ae9be9c6adf8f2d1382fed88f1daf03bf Mon Sep 17 00:00:00 2001 From: Owain Ainsworth Date: Sun, 18 Apr 2010 16:55:37 -0700 Subject: radeon: Fix command type for DRM_RADEON_IRQ_EMIT ioctl. This should be drmCommandWriteRead to avoid an EINVAL error on systems that strictly check ioctl args. This command has been r/w for ever. Discussion with airlied agreed that this was the correct course. Signed-off-by: Brian Paul --- src/mesa/drivers/dri/radeon/radeon_cs_legacy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c index cc951a12cbc..c2722a4e195 100644 --- a/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_cs_legacy.c @@ -326,7 +326,7 @@ static int cs_emit(struct radeon_cs_int *cs) (!IS_R600_CLASS(csm->ctx->radeonScreen))) { /* +r6/r7 : No irq for r6/r7 yet. */ drm_radeon_irq_emit_t emit_cmd; emit_cmd.irq_seq = (int*)&csm->pending_age; - r = drmCommandWrite(cs->csm->fd, DRM_RADEON_IRQ_EMIT, &emit_cmd, sizeof(emit_cmd)); + r = drmCommandWriteRead(cs->csm->fd, DRM_RADEON_IRQ_EMIT, &emit_cmd, sizeof(emit_cmd)); if (r) { return r; } -- cgit v1.2.3 From f4553d99c63e4bcb4d023c9e33b72fedd0dfbdc1 Mon Sep 17 00:00:00 2001 From: Matthieu Herrb Date: Sun, 18 Apr 2010 16:55:38 -0700 Subject: radeon: Let this build with gcc 3.3 Declaring the loop index inside for () is not supported by this version. Signed-off-by: Brian Paul --- src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index e0e271b7711..6c570a571af 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -512,8 +512,10 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj, unsigned mtCount = 0; unsigned maxMtIndex = 0; radeon_mipmap_tree *tmp; + unsigned int level; + int i; - for (unsigned level = firstLevel; level <= lastLevel; ++level) { + for (level = firstLevel; level <= lastLevel; ++level) { radeon_texture_image *img = get_radeon_texture_image(texObj->base.Image[0][level]); unsigned found = 0; // TODO: why this hack?? @@ -523,7 +525,7 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj, if (!img->mt) continue; - for (int i = 0; i < mtCount; ++i) { + for (i = 0; i < mtCount; ++i) { if (mts[i] == img->mt) { found = 1; mtSizes[i] += img->mt->levels[img->mtlevel].size; @@ -544,7 +546,7 @@ static radeon_mipmap_tree * get_biggest_matching_miptree(radeonTexObj *texObj, return NULL; } - for (int i = 1; i < mtCount; ++i) { + for (i = 1; i < mtCount; ++i) { if (mtSizes[i] > mtSizes[maxMtIndex]) { maxMtIndex = i; } -- cgit v1.2.3 From cf7d08b4434325220488d4c9e871e230bafd7b7c Mon Sep 17 00:00:00 2001 From: Matthieu Herrb Date: Mon, 19 Apr 2010 09:32:37 -0600 Subject: mesa: Fix build with gcc 3.3. Signed-off-by: Brian Paul --- src/mesa/main/imports.c | 3 ++- src/mesa/main/imports.h | 6 ++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/mesa/main/imports.c b/src/mesa/main/imports.c index 1ae08533648..b1389b25f2a 100644 --- a/src/mesa/main/imports.c +++ b/src/mesa/main/imports.c @@ -564,7 +564,8 @@ _mesa_ffsll(int64_t val) unsigned int _mesa_bitcount(unsigned int n) { -#if defined(__GNUC__) +#if defined(__GNUC__) && \ + ((_GNUC__ == 3 && __GNUC_MINOR__ >= 4) || __GNUC__ >= 4) return __builtin_popcount(n); #else unsigned int bits; diff --git a/src/mesa/main/imports.h b/src/mesa/main/imports.h index d28f4ad125d..1c263aabca1 100644 --- a/src/mesa/main/imports.h +++ b/src/mesa/main/imports.h @@ -404,7 +404,8 @@ _mesa_is_pow_two(int x) static INLINE int32_t _mesa_next_pow_two_32(uint32_t x) { -#ifdef __GNUC__ +#if defined(__GNUC__) && \ + ((__GNUC__ == 3 && __GNUC_MINOR__ >= 4) || __GNUC__ >= 4) uint32_t y = (x != 1); return (1 + y) << ((__builtin_clz(x - y) ^ 31) ); #else @@ -422,7 +423,8 @@ _mesa_next_pow_two_32(uint32_t x) static INLINE int64_t _mesa_next_pow_two_64(uint64_t x) { -#ifdef __GNUC__ +#if defined(__GNUC__) && \ + ((__GNUC__ == 3 && __GNUC_MINOR__ >= 4) || __GNUC__ >= 4) uint64_t y = (x != 1); if (sizeof(x) == sizeof(long)) return (1 + y) << ((__builtin_clzl(x - y) ^ 63)); -- cgit v1.2.3 From c060265bdb953f0c9d73e60f08c53a2e3b1a1176 Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Mon, 19 Apr 2010 10:10:41 -0600 Subject: st/mesa: invert scissor rect depending on FB orientation Fixes fd.o bug 27715 --- src/mesa/state_tracker/st_atom_scissor.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mesa/state_tracker/st_atom_scissor.c b/src/mesa/state_tracker/st_atom_scissor.c index 5e0c51cff0a..56b1383ae39 100644 --- a/src/mesa/state_tracker/st_atom_scissor.c +++ b/src/mesa/state_tracker/st_atom_scissor.c @@ -72,12 +72,15 @@ update_scissor( struct st_context *st ) scissor.minx = scissor.miny = scissor.maxx = scissor.maxy = 0; } - /* Now invert Y. Pipe drivers use the convention Y=0=top for surfaces + /* Now invert Y if needed. + * Gallium drivers use the convention Y=0=top for surfaces. */ - miny = fb->Height - scissor.maxy; - maxy = fb->Height - scissor.miny; - scissor.miny = miny; - scissor.maxy = maxy; + if (st_fb_orientation(fb) == Y_0_TOP) { + miny = fb->Height - scissor.maxy; + maxy = fb->Height - scissor.miny; + scissor.miny = miny; + scissor.maxy = maxy; + } if (memcmp(&scissor, &st->state.scissor, sizeof(scissor)) != 0) { /* state has changed */ -- cgit v1.2.3 From 385e2896ebf54ac0b016132fe513f21a5b67ba4f Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Mon, 19 Apr 2010 09:54:08 -0700 Subject: DRI2: synchronize swap interval with server at startup time In the direct rendered case, we need to tell the server our initial swap interval. If we don't, the local and server values will be out of sync, since the server and client defaults may be different (as they were before this patch). --- src/glx/dri2_glx.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c index 06f3d8b71c0..d09d614741d 100644 --- a/src/glx/dri2_glx.c +++ b/src/glx/dri2_glx.c @@ -185,7 +185,7 @@ dri2CreateDrawable(__GLXscreenConfigs * psc, pdraw->base.drawable = drawable; pdraw->base.psc = psc; pdraw->bufferCount = 0; - pdraw->swap_interval = 0; + pdraw->swap_interval = 1; DRI2CreateDrawable(psc->dpy, xDrawable); @@ -200,6 +200,11 @@ dri2CreateDrawable(__GLXscreenConfigs * psc, return NULL; } + /* + * Make sure server has the same swap interval we do for the new + * drawable. + */ + DRI2SwapInterval(psc->dpy, xDrawable, pdraw->swap_interval); return &pdraw->base; } -- cgit v1.2.3