From 591a996ab6a8ef96a46e88317071330d94c4138f Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 21 Dec 2009 13:08:41 -0800 Subject: i965: Move PIPELINE_SELECT to the top of gen6 3d pipeline setup. --- src/mesa/drivers/dri/i965/brw_state_upload.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 824502ca6eb..aa83d7ad18e 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -116,6 +116,8 @@ const struct brw_tracked_state *gen6_atoms[] = &gen6_cc_vp, /* Command packets: */ + &brw_invarient_state, + &gen6_viewport_state, /* must do after *_vp stages */ &gen6_urb, @@ -138,8 +140,6 @@ const struct brw_tracked_state *gen6_atoms[] = &gen6_scissor_state, - &brw_invarient_state, - &brw_state_base_address, &gen6_binding_table_pointers, -- cgit v1.2.3