From 3db01cd4e7eac377a991c2a5c63adbdf846cb5bf Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Sat, 6 May 2017 21:14:11 +0100 Subject: radv: apply the tess+GS hang workaround to Polaris12 as well As I pointed out for radeonsi, and AMD confirmed, so fix this in radv as well. Cc: "17.1" Reviewed-by: Bas Nieuwenhuizen Signed-off-by: Dave Airlie (cherry picked from commit 2add79a73291e40621081b9a12938ac1931b9e96) --- src/amd/vulkan/si_cmd_buffer.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index fbb21117aa3..8d7db96445c 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -672,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer, if (family == CHIP_TONGA || family == CHIP_FIJI || family == CHIP_POLARIS10 || - family == CHIP_POLARIS11) + family == CHIP_POLARIS11 || + family == CHIP_POLARIS12) partial_vs_wave = true; } else { partial_vs_wave = true; -- cgit v1.2.3