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* mesa: remove unreachable code from _mesa_write_shader_to_file()Timothy Arceri2016-06-301-10/+0
| | | | | | | _mesa_write_shader_to_file() is only used to print gl shader objects so Program should never be set as it only gets set for linked shaders. Acked-by: Iago Toral Quiroga <[email protected]>
* glsl: pass symbols to find_matching_signature() rather than shaderTimothy Arceri2016-06-301-25/+22
| | | | | | This will allow us to later split gl_shader into two structs. Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: pass symbols rather than shader to _mesa_get_main_function_signature()Timothy Arceri2016-06-305-7/+7
| | | | | | | This will allow us to split gl_shader into two different structs, one for shader objects and one for linked shaders. Reviewed-by: Iago Toral Quiroga <[email protected]>
* mesa: don't use drivers NewShader function when creating shader objectsTimothy Arceri2016-06-301-2/+1
| | | | | | | The drivers function only needs to be used when creating a struct for linked shaders. Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: make cross_validate_globals() more genericTimothy Arceri2016-06-301-206/+207
| | | | | | | | | Rather than passing in gl_shader we now pass in the IR. This will allow us to later split gl_shader into two structs. One for use as a linked per stage shader struct and one for use as a GL shader object. Reviewed-by: Iago Toral Quiroga <[email protected]>
* mapi: Export all GLES 3.1 functions in libGLESv2.soIan Romanick2016-06-291-0/+51
| | | | | | | | | | | | | | | | | Khronos recommends that the GLES 3.1 library also be called libGLESv2. It also requires that functions be statically linkable from that library. NOTE: Mesa has supported the EGL_KHR_get_all_proc_addresses extension since at least Mesa 10.5, so applications targeting Linux should use eglGetProcAddress to avoid problems running binaries on systems with older, non-GLES 3.1 libGLESv2 libraries. Signed-off-by: Ian Romanick <[email protected]> Cc: "11.2 12.0" <[email protected]> Cc: Mike Gorchak <[email protected]> Reported-by: Mike Gorchak <[email protected]> Acked-by: Chad Versace <[email protected]>
* i965: Use drmIoctl for DRM_I915_GETPARAM (v2)Chad Versace2016-06-291-5/+6
| | | | | | | | Stop using drmCommandWriteRead for such a simple ioctl. v2: Handle errno correctly. [ickle] Reviewed-by: Chris Wilson <[email protected]>
* radeon/uvd: fix a h265 context size bugsonjiang2016-06-291-0/+3
| | | | | | | Signed-off-by: sonjiang <[email protected]> Cc: "12.0" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: seperate uvd context buffer from DPBsonjiang2016-06-291-9/+97
| | | | | | | Signed-off-by: sonjiang <[email protected]> Cc: "12.0" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon uvd add uvd fw version for amdgpusonjiang2016-06-292-1/+11
| | | | | | | Signed-off-by: sonjiang <[email protected]> Cc: "12.0" <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* nv50/ir: print EMIT subops in debug modeSamuel Pitoiset2016-06-291-0/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: print RSQ/RCP subops in debug modeSamuel Pitoiset2016-06-291-0/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: print PIXLD subops in debug modeSamuel Pitoiset2016-06-291-0/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: print SHFL subops in debug modeSamuel Pitoiset2016-06-291-0/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium/radeon: remove zombie textures kept alive by DCC stat gatheringMarek Olšák2016-06-291-12/+27
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: don't re-create queries for DCC stat gatheringMarek Olšák2016-06-293-5/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: assume X11 DRI3 can use at most 5 back buffersMarek Olšák2016-06-291-1/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: separate DCC starts as disabled (ps_draw_ratio = 0)Marek Olšák2016-06-291-9/+10
| | | | | | | | | | | | | | DRI3: - Only slows clears can enable it for the first frame. - A good PS/draw ratio can enable it for other frames. DRI2: - Only slows clears can enable it for a frame. - Page-flipped color buffers are unref'd at the end of each frame, so it can't be enabled in any other way. - Relying on slow clears is sufficient for our synthetic benchmarks. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: R600_DEBUG=nodccfb disables separate DCCMarek Olšák2016-06-293-1/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add and use r600_texture_referenceMarek Olšák2016-06-295-10/+13
| | | | | | Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Vedran Miletić <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add a HUD query for PS draw ratio stats from separate DCCMarek Olšák2016-06-294-0/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add a heuristic enabling DCC for scanout surfaces (v2)Marek Olšák2016-06-296-4/+338
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DCC for displayable surfaces is allocated in a separate buffer and is enabled or disabled based on PS invocations from 2 frames ago (to let queries go idle) and the number of slow clears from the current frame. At least an equivalent of 5 fullscreen draws or slow clears must be done to enable DCC. (PS invocations / (width * height) + num_slow_clears >= 5) Pipeline statistic queries are always active if a color buffer that can have separate DCC is bound, even if separate DCC is disabled. That means the window color buffer is always monitored and DCC is enabled only when the situation is right. The tracking of per-texture queries in r600_common_context is quite ugly, but I don't see a better way. The first fast clear always enables DCC. DCC decompression can disable it. A later fast clear can enable it again. Enable/disable typically happens only once per frame. The impact is expected to be negligible because games usually don't have a high level of overdraw. DCC usually activates when too much blending is happening (smoke rendering) or when testing glClear performance and CMASK isn't supported (Stoney). v2: rename stuff, add assertions Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add state setup for a separate DCC bufferMarek Olšák2016-06-294-5/+41
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: always calculate DCC info even if it's not used immediatelyMarek Olšák2016-06-292-2/+2
| | | | | | for a later use Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: unreference framebuffer state with set_framebuffer_stateMarek Olšák2016-06-293-4/+6
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: add flag R600_QUERY_HW_FLAG_BEGIN_RESUMESMarek Olšák2016-06-292-1/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Use intel_get_param() more oftenChad Versace2016-06-291-11/+5
| | | | | | | | Replace some open-coded ioctls with intel_get_param(). This is just a cleanup. No change in behavior. Reviewed-by: Ian Romanick <[email protected]>
* i965: Refactor intel_get_param()Chad Versace2016-06-291-7/+8
| | | | | | | Replace the function's __DRIscreen parameter with struct intel_screen. The callsites feel more natural that way. Reviewed-by: Ian Romanick <[email protected]>
* radeonsi: don't advertise multisample shader imagesMarek Olšák2016-06-291-0/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enable distributed tess on multi-SE parts onlyMarek Olšák2016-06-294-2/+7
| | | | | | | ported from Vulkan Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set optimal VGT_HS_OFFCHIP_PARAMMarek Olšák2016-06-295-14/+49
| | | | | | | ported from Vulkan Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enable CU0 in each SE for LS-HS executionMarek Olšák2016-06-291-2/+1
| | | | | | | Offchip-only tessellation allows this. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use conformant line rasterizationMarek Olšák2016-06-294-5/+29
| | | | | | | | | | AA lines are not completely correct (see TODO), but everything else should be. + 3 linestipple piglits Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* Android: add missing u_math.h include path for libmesa_islRob Herring2016-06-281-0/+2
| | | | | | | | | | | | | | | Commit 87d062a94080 ("i965: Fix shared local memory size for Gen9+.") added u_math.h include which broke the Android build: In file included from external/mesa3d/src/intel/isl/isl_storage_image.c:25: In file included from external/mesa3d/src/mesa/drivers/dri/i965/brw_compiler.h:29: external/mesa3d/src/mesa/main/macros.h:35:10: fatal error: 'util/u_math.h' file not found ^ Add the missing include paths for libmesa_isl. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Kenneth Garunke <[email protected]>
* svga: force direct map for transfering multiple slicesCharmaine Lee2016-06-281-15/+24
| | | | | | | | | | | | | With commit fb9fe35, we start using transfer_inline_write for memcpy of TexSubImage. But SurfaceDMA command does not work well with texture array. This patch forces direct map when transfering multiple slices of a texture array. Fixes piglit regression "texelFetch fs sampler1DArray" Tested with MTT piglit, glretrace, conform. Reviewed-by: Sinclair Yeh <[email protected]>
* svga: whitespace, line wrapping fixes in svga_surface.cBrian Paul2016-06-281-11/+16
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* gm107/ir: make sure that flagsDef is set when emitting setcondSamuel Pitoiset2016-06-281-1/+1
| | | | | | | | | | | Rely on the existence of a second destination when emitting a setcond flag is dangerous, because this doesn't mean that the flag has been correctly set. Instead rely on flagsDef like what emitX() does for flagsSrc. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: <[email protected]>
* radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on PolarisMarek Olšák2016-06-282-0/+11
| | | | | | | This was missing. Cc: 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/vce: use vce structure for vce 52 firmwareBoyuan Zhang2016-06-285-98/+517
| | | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* radeon/vce: add vce structuresBoyuan Zhang2016-06-281-0/+297
| | | | | | Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Leo Liu <[email protected]>
* st/omx: fix decoder fillout for the OMX result bufferLeo Liu2016-06-281-4/+5
| | | | | | | | | | | | | The call for vl_video_buffer_adjust_size is with wrong order of arguments, apparently it will have problem when interlaced false; The size of OMX result buffer depends on real size of clips, vl buffer dimension is aligned with 16, so 1080p(1920*1080) video will overflow the OMX buffer Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Julien Isorce <[email protected]>
* pipe_loader_sw: Fix fd leak when instantiated via pipe_loader_sw_probe_kmsHans de Goede2016-06-281-0/+7
| | | | | | | | | | | | Make pipe_loader_sw_probe_kms take ownership of the passed in fd, like pipe_loader_drm_probe_fd does. The only caller is dri_kms_init_screen which passes in a dupped fd, just like dri2_init_screen passes in a dupped fd to pipe_loader_drm_probe_fd. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* clover: Fix kernel metadata retrieval after clang r273425Jan Vesely2016-06-271-4/+31
| | | | | Signed-off-by: Jan Vesely <[email protected]> Acked-by: Francisco Jerez <[email protected]>
* clover/llvm: Fix copyright attribution of invocation.cpp.Francisco Jerez2016-06-271-1/+5
| | | | | | | | | | This file still only has my name on the copyright notice even though most of the code (likely more than 90% of it) was authored by various contributors -- It doesn't seem right to have the whole file attributed to myself. Acked-by: Michel Dänzer <[email protected]> Acked-by: Serge Martin <[email protected]>
* i965: Print EOT in fs_visitor::dump_instruction().Kenneth Graunke2016-06-271-0/+4
| | | | | | | This was useful when debugging the previous commit's issue. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965: Make emit_urb_writes() not produce an EOT message for GS.Kenneth Graunke2016-06-271-0/+7
| | | | | | | | | | | | | | | | | | | | | | | emit_urb_writes() contains code to emit an EOT write with no actual data when there are no output varyings. This makes sense for the VS and TES stages, where it's called once at the end of the program. However, in the geometry shader stage, emit_urb_writes() is called once for every EmitVertex(). We explicitly emit a URB write with EOT set at the end of the shader, separately from this path. So we'd better not terminate the thread. This could get us into trouble for shaders which do EmitVertex() with no varyings followed by SSBO/image/atomic writes. It also caused us to emit multiple sends with EOT set, which apparently confuses the register allocator into not using g112-g127 for all but the first one. This caused EU validation failures in OglGSCloth shaders in shader-db. (The actual application was fine, but shader-db thinks there are no outputs because it doesn't understand transform feedback.) Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* glsl: Ignore ir_texture in lower_const_arrays_to_uniforms.Kenneth Graunke2016-06-271-0/+7
| | | | | | | | | | | | | The only part of an ir_texture which can be an array is the offsets array in textureGatherOffsets() calls. We don't want to lower those, because they're required to remain constants. Fixes textureGatherOffsets with Gallium drivers such as llvmpipe, which commit ef78df8d3b0cf540e5f08c8c2f6caa338b64a6c7 regressed. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gm107/ir: add missing setcond flags for LOP variantsSamuel Pitoiset2016-06-281-0/+2
| | | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: <[email protected]>
* gm107/ir: make use of LOP32I for all immediatesSamuel Pitoiset2016-06-281-1/+1
| | | | | | | | LOP only allows to emit 19-bits immediates. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: <[email protected]>
* virgl: reduce some limits for nowDave Airlie2016-06-281-3/+4
| | | | | | | | | These need to be passed from the host in caps structure if they are larger, this fixes a bunch of tests on Intel hw, that I'd put the limits too high for. Cc: "11.2 12.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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