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* nir: Make gl_FrontFacing a system_valueJason Ekstrand2015-02-141-2/+8
| | | | | | | | | GLSL IR labels gl_FrontFacing as an input variable and not a system value. This commit makes NIR silently translate gl_FrontFacing to a system value so that it properly gets translated into a load_system_value intrinsic. Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/nir: Add support for nir_intrinsic_load_front_faceJason Ekstrand2015-02-141-1/+3
| | | | Reviewed-by: Matt Turner <[email protected]>
* nir/lower_phis_to_scalar: Fix some logic in is_phi_scalarizableJason Ekstrand2015-02-141-3/+3
| | | | | Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* clover: Use Legacy PassManager for LLVM trunk (3.7)Shawn Starr2015-02-141-0/+9
| | | | | Reviewed-by: Tom Stellard <[email protected]> Signed-off-by: Shawn Starr <[email protected]>
* ilo: fix JIP/UIP on Gen8Chia-I Wu2015-02-142-9/+25
| | | | UIP is in DW2 and JIP is in DW3 on Gen8. Also, the units are in bytes.
* ilo: do not set GEN6_THREADCTRL_SWITCHChia-I Wu2015-02-141-4/+0
| | | | It is not needed on Gen6+, and it appears to be broken on Gen8.
* ilo: correct ISA UIP/JIP decoding for Gen8Chia-I Wu2015-02-141-18/+39
| | | | JIP is int32_t and UIP is in DW2 on Gen8.
* ilo: prepare for 64-bit immediates decodingChia-I Wu2015-02-141-15/+31
| | | | Replace imm32 by imm64. Add more ways (UD, D, etc) to access the immediate.
* ilo: cleanup ISA DW1 decodingChia-I Wu2015-02-141-34/+55
| | | | Decode the higher and lower 16 bits separately.
* ilo: cleanup ISA DW0 decodingChia-I Wu2015-02-141-10/+16
| | | | | Add disasm_inst_decode_dw0_opcode_gen6() to decode the opcode. Simplify branch_ctrl/acc_wr_ctrl decoding.
* ilo: update some outdated gen checksChia-I Wu2015-02-141-4/+4
| | | | | | Update gen checks for 3DSTATE_POLY_STIPPLE_OFFSET, 3DSTATE_POLY_STIPPLE_PATTERN, 3DSTATE_LINE_STIPPLE, and 3DSTATE_AA_LINE_PARAMETERS.
* ilo: fix rectlist length on Gen8Chia-I Wu2015-02-141-1/+1
| | | | 5 PIPE_CONTROLs, 2 3DSTATE_WM_HZ_OP, and depth buffer setup require 65 DWords.
* ilo: fix 3DSTATE_VF_TOPOLOGYChia-I Wu2015-02-141-2/+1
| | | | The pipe primitive type was wrongly translated twice.
* os,llvmpipe: Set rasterizer thread names on Linux.Jose Fonseca2015-02-132-1/+18
| | | | | | | | | | | To help identify llvmpipe rasterizer threads -- especially when there can be so many. We can eventually generalize this to other OSes, but for that we must restrict the function to be called from the current thread. See also http://stackoverflow.com/a/7989973 Reviewed-by: Roland Scheidegger <[email protected]>
* uti/u_atomic: Don't test p_atomic_add with booleans.Jose Fonseca2015-02-131-6/+19
| | | | | | | | | | | Add another class of tests. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=89112 I failed to spot this in my previous change, because bool was a typedef for char on the system I tested. Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: fix OES_texture_float texture render target behaviorTapani Pälli2015-02-131-0/+12
| | | | | | | | | | | | | | | | | Current implementation allowed usage of unsized type texture GL_FLOAT and GL_HALF_FLOAT as a render target as this was 'expected behavior' by WEBGL_oes_texture_float and is also allowed by the oes-texture-float WebGL test. However this broke some ES3 conformance tests that do not accept such behavior. Patch sets such an fbo incomplete as expected by the ES3 conformance tests. Textures with sized types like RGBA32F will still continue to work as render targets. v2: code style cleanups (Ian Romanick, Matt Turner) Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88905 Reviewed-by: Ian Romanick <[email protected]> Cc: "10.5" <[email protected]>
* vc4: Make SF be a flag on the QIR instructions.Eric Anholt2015-02-128-51/+47
| | | | | | | | | | | | Right now the places that used to emit a mov.sf just put the SF on the previous instruction when it generated the source of the SF value. Even without optimization to push the sf up further (and kill thus potentially kill more MOVs), this gets us: total uniforms in shared programs: 13455 -> 13457 (0.01%) uniforms in affected programs: 3 -> 5 (66.67%) total instructions in shared programs: 40296 -> 40198 (-0.24%) instructions in affected programs: 12595 -> 12497 (-0.78%)
* r200: Drop unused variable.Eric Anholt2015-02-121-1/+0
| | | | | | | | Quiets compiler warning since e7f2f2dea5acdbd1a12ed88914e64a38a97432f0. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* i965: Quiet another compiler warning about uninitialized values.Eric Anholt2015-02-121-2/+2
| | | | | | | | The compiler can't tell that we're always going to hit the first if block on the first time through the loop. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Move some asserts to unreachable.Eric Anholt2015-02-121-2/+2
| | | | | | | | | | If execution was supposed to be supported in this case, we'd run into trouble from completely uninitialized sat_imm values. v2: Drop the '!' before the string. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Shut up a compiler warning about uninitialized var.Eric Anholt2015-02-121-1/+1
| | | | | | | | We always pass this argument, even if it won't be used by the particular texture op. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* Revert use of Mesa IR optimizer for ARB_fragment_programsCarl Worth2015-02-121-3/+0
| | | | | | | | | | | | | | | | | | | | Commit f82f2fb3dc770902f1657ab1c22e6004faa3afab added use of the Mesa IR optimizer for both ARB_fragment_program and ARB_vertex_program, but only justified the vertex-program portions with measured performance improvements. Meanwhile, the optimizer was seen to generate hundreds of unused immediates without discarding them, causing failures. Discard the use of the optimizer for now to fix the regression. (In the future, we anticpate things moving from Mesa IR to NIR for better optimization anyway.) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82477 Reviewed-by: Ian Romanick <[email protected]> CC: "10.3 10.4 10.5" <[email protected]>
* util/u_atomic: Use lower-case variables in _Interlocked* helpers.Jose Fonseca2015-02-121-33/+33
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* util/u_atomic: Add _InterlockedExchangeAdd8/16 for older MSVC.Jose Fonseca2015-02-121-4/+33
| | | | | | | | We need to build certain parts of Mesa (namely gallium, llvmpipe, and therefore util) with Windows SDK 7.0.7600, which includes MSVC 2008. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* util/u_atomic: Test p_atomic_add() for 8bit integers.Jose Fonseca2015-02-121-15/+17
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* egl: Soften several HAVE_DRM_PLATFORM to HAVE_LIBDRMAxel Davy2015-02-121-7/+7
| | | | | | | | | | | | | | | | | | | | | To fix build when libdrm is not found, commit a594cec7e3ef275c386054127a357110a19dd823 did put several parts of egl code under #ifdef HAVE_DRM_PLATFORM. HAVE_DRM_PLATFORM means the egl drm platform is being built. What should have been used instead is HAVE_LIBDRM. At a few locations, the HAVE_DRM_PLATFORM introduced have already been replaced by HAVE_LIBDRM, this patch replaces the remaining occurences. This patch makes for example EGL_EXT_image_dma_buf_import be advertised by egl under x11 when the drm egl platform is not built, whereas previously it required the drm egl platform to be built. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* auxiliary/vl: bring back the VL code for the dri targetsEmil Velikov2015-02-128-6/+25
| | | | | | | | | | | | | | | | | With commit c642e87d9f4(auxiliary/vl: rework the build of the VL code) we split out the VL code into a separate static library that was meant to be used by the VL targets alone - va, vdpau, xvmc. The commit failed to consider the way we handle vdpau-gl interop and broke it. Bring back the functionality by keeping the vl <> vl_stub separation as requrested by Christian. v2: Update the omx target as well. Update mesa-stable email address. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86837 Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Tested-by: Andy Furniss <[email protected]>
* nir: add missing header to the sources listEmil Velikov2015-02-121-0/+1
| | | | | | | Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* nir: resolve nir.h dependency list (fix make distcheck)Emil Velikov2015-02-121-1/+1
| | | | | | | | | | Use nir/nir_opcodes.h as is (w/o the absolute path), as it is the target name used to generate the actual file. Otherwise the target is missing, the file won't get generated and the build will fail. Cc: "10.5" <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/vs/skl: Use vec4 datatypes for message headerBen Widawsky2015-02-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | We're using a SIMD4x2 sampler message, which has execsize 4, and so the register width must be <= 4. Use <4,4,1> regioning instead of <8,8,1> regioning to access the same data but avoid tripping the assert. Fixes the following piglit tests: spec/glsl-1.20/compiler/structure-and-array-operations/array-selection.vert spec/glsl-es-3.00/compiler/uniform_block/interface-name-basic.vert spec/glsl-es-3.00/compiler/uniform_block/interface-name-field-clashes-with-struct.vert spec/glsl-es-3.00/compiler/uniform_block/interface-name-field-clashes-with-function.vert spec/glsl-es-3.00/compiler/uniform_block/interface-name-array.vert glslparsertest/glsl2/condition-07.vert spec/glsl-es-3.00/compiler/uniform_block/interface-name-field-clashes-with-variable.vert v2: Better commit message courtesy of Ken. I had a discussion with Ken, and we both question how we end up with a mov and execsize 4. For now though, this fixes the piglit tests, so we can worry about it later. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ilo: update screen init for Gen8Chia-I Wu2015-02-121-8/+32
| | | | | This is very preliminary and is only tested with glxgears. All information about Gen8 is derived from i965 and beignet.
* ilo: update outdated render command emissions for Gen8Chia-I Wu2015-02-121-4/+4
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* ilo: update rectlist command emission for Gen8Chia-I Wu2015-02-124-7/+93
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* ilo: update draw command emission for Gen8Chia-I Wu2015-02-126-34/+517
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* ilo: update surface state emission for Gen8Chia-I Wu2015-02-121-7/+8
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* ilo: update dynamic state emission for Gen8Chia-I Wu2015-02-121-14/+26
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* ilo: update outdated gen assertions for Gen8Chia-I Wu2015-02-126-24/+23
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* ilo: add new WM related helpers for Gen8Chia-I Wu2015-02-121-0/+76
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* ilo: update VS related functions for Gen8Chia-I Wu2015-02-122-1/+31
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* ilo: update VF related functions for Gen8Chia-I Wu2015-02-122-42/+157
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* ilo: update SAMPLER_STATE for Gen8Chia-I Wu2015-02-121-29/+42
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* ilo: update SAMPLER_BORDER_COLOR_STATE for Gen8Chia-I Wu2015-02-121-2/+3
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* ilo: update depth clear value for Gen8Chia-I Wu2015-02-121-1/+4
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* ilo: update ilo_zs_surface for Gen8Chia-I Wu2015-02-125-82/+137
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* ilo: update ilo_view_surface for Gen8Chia-I Wu2015-02-124-43/+141
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* ilo: update texture layout for Gen8Chia-I Wu2015-02-121-1/+3
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* ilo: update ilo_blend_state and related functions for Gen8Chia-I Wu2015-02-126-22/+319
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* ilo: update ilo_dsa_state and related functions for Gen8Chia-I Wu2015-02-123-6/+89
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* ilo: update multisample related states for Gen8Chia-I Wu2015-02-123-1/+116
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* ilo: update WM and PS related functions for Gen8Chia-I Wu2015-02-122-76/+264
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