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* mesa: Split out the format code from update_array()Fredrik Höglund2013-11-071-57/+93
| | | | | | | | | | Split out the code for updating the array format into a new function called update_array_format(). This function will be called by both update_array() and the new glVertexAttrib*Format() entry points in ARB_vertex_attrib_binding. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Restore gl_array_object::NewArrayFredrik Höglund2013-11-074-0/+10
| | | | | | | | This will be used by the ARB_vertex_attrib_binding implementation. This reverts commit db38e9a0e179441f59274f6f2a751912c29872e2. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* i965: Use has_surface_tile_offset in depth/stencil alignment workaround.Kenneth Graunke2013-11-071-2/+2
| | | | | | | | | | | | | Currently, has_surface_tile_offset is equivalent to gen == 4 && !is_g4x. We already use it for related checks in brw_wm_surface_state.c, so it makes sense to use it here too. It's simpler and more future-proof. Broadwell also lacks surface tile offsets. With this patch, I won't need to update any generation checking; I can simply not set the flag. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium: fix build on GNU/kFreeBSDFabio Pedretti2013-11-062-2/+2
| | | | | | | Patch from Debian package Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Andreas Boll <[email protected]>
* mesa: add arm64 supportFabio Pedretti2013-11-061-1/+1
| | | | | | | Patch from Ubuntu package Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Andreas Boll <[email protected]>
* r600/compute: silence unused var warningFabio Pedretti2013-11-061-1/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* i965/gen6: Don't allow SIMD16 dispatch in 4x PERPIXEL mode with computed depth.Paul Berry2013-11-061-1/+33
| | | | | | | Hardware docs say we can only use SIMD8 dispatch in this condition. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: Build program as part of libmesa.Matt Turner2013-11-062-53/+18
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* mesa: Clean up use of top_srcdir/top_builddir.Matt Turner2013-11-061-11/+4
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* i965: Use unreachable() to silence a compiler warning.Matt Turner2013-11-061-0/+1
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* mesa: Add unreachable() macro.Matt Turner2013-11-061-0/+15
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* gallivm: fix indirect addressing of inputsRoland Scheidegger2013-11-061-17/+28
| | | | | | | | | | | | We weren't adding the soa offsets when constructing the indices for the gather functions. That meant that we were always returning the data in the first element. (Copied straight from the same fix for temps.) While here fix up a couple of broken comments in the fetch functions, plus don't name a straight float type float4 which is just confusing. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Zack Rusin <[email protected]>
* r600/llvm: Fix isampleBuffer on preEGVincent Lejeune2013-11-061-1/+14
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* r600/llvm: Fix texbuf for pre EG genVincent Lejeune2013-11-061-0/+29
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* mesa: for GLSL_DUMP_ON_ERROR, also dump the info logBrian Paul2013-11-061-0/+2
| | | | | | | Since it's helpful to know why the shader did not compile. Also, call fflush() for Windows. Reviewed-by: José Fonseca <[email protected]>
* st/vdpau: resolve delayed rendering for GL interop v2Grigori Goronzy2013-11-061-0/+4
| | | | | | | | | Otherwise OutputSurface interop has funny results sometimes. This fixes interop with the mpv media player. v2 (chk): add proper locking Signed-off-by: Christian König <[email protected]>
* i965/fs: Gen4-5: Implement alpha test in shader for MRTChris Forbes2013-11-063-0/+58
| | | | | | | | V2: Add comment explaining what emit_alpha_test() is for; fix spurious temp and bogus whitespace. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965/fs: Gen4-5: Setup discard masks for MRT alpha testChris Forbes2013-11-062-2/+2
| | | | | | | | The same setup is required here as when the user-provided shader explicitly uses KIL or discard. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Gen4-5: Include alpha func/ref in program keyChris Forbes2013-11-062-0/+18
| | | | | | | V2: Better explanation of the rationale for doing this. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Gen4-5: Don't enable hardware alpha test with MRTChris Forbes2013-11-061-1/+2
| | | | | | | | We have to do this in the shader instead, since these gens lack an independent RT0 alpha value in their render target write messages. Signed-off-by: Chris Forbes <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Combine {brw,gen7}_update_texture_buffer_surface() functions.Kenneth Graunke2013-11-053-40/+5
| | | | | | | | Now that brw_update_texture_buffer_surface() uses the virtual emit_buffer_surface_state() function, it works for Gen7+ too. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Unvirtualize brw_create_constant_surface; delete Gen7+ variant.Kenneth Graunke2013-11-054-45/+17
| | | | | | | | | Now that brw_create_constant_surface uses a virtual function internally, it doesn't need to be virtual itself. We can delete the Gen7+ variant and simplify things. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Use the new emit_buffer_surface_state() vtable entry.Kenneth Graunke2013-11-051-10/+10
| | | | | | | | This will allow us to combine the Gen4-6 and Gen7 variants of these functions. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Virtualize emit_buffer_surface_state().Kenneth Graunke2013-11-053-4/+20
| | | | | | | | | This entails adding "mocs" and "rw" parameters to the Gen4-5 version. I made it actually pay attention to the rw flag (even though it is always false), but mocs is always ignored. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Paul Berry <[email protected]>
* i965: Fix compiler warning.Courtney Goeltzenleuchter2013-11-052-2/+2
| | | | | | | fix: intel_screen.c:1320:4: warning: initialization from incompatible pointer type [enabled by default] Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Tell the unit states how many binding table entries we have.Eric Anholt2013-11-057-5/+22
| | | | | | | | | | Before the series with 3c9dc2d31b80fc73bffa1f40a91443a53229c8e2 to dynamically assign our binding table indices, we didn't really track our binding table count per shader, so we never filled in these fields. Affects cairo-gl trace runtime by -2.47953% +/- 1.07281% (n=20) Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix context initialization after 2f896627175384fd5Eric Anholt2013-11-051-3/+6
| | | | | | | | You can't return stack-initialized values and expect anything good to happen. Reviewed-by: Chad Versace <[email protected] Reviewed-by: Matt Turner <[email protected]>
* gallivm: optimize lp_build_minify for sseRoland Scheidegger2013-11-053-13/+54
| | | | | | | | | | | | | | | | | SSE can't handle true vector shifts (with variable shift count), so llvm is turning them into a mess of extracts, scalar shifts and inserts. It is however possible to emulate them in lp_build_minify with float muls, which should be way faster (saves over 20 instructions per 8-wide lp_build_minify). This wouldn't work for "generic" 32bit shifts though since we've got only 24bits of mantissa (actually for left shifts it would work by using sse41 int mul instead of float mul but not for right shifts). Note that this has very limited scope for now, since this is only used with per-pixel lod (otherwise we're avoiding the non-constant shift count by doing per-quad shifts manually), and only 1d textures even then (though the latter should change). Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* nouveau: Use _NEW_SCISSOR instead of hooking through dd_function_tableIan Romanick2013-11-051-7/+3
| | | | | | | | This will enable removing the dd_function_table::Scissor hook in the near future. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* nouveau: Use _NEW_VIEWPORT instead of hooking through dd_function_tableIan Romanick2013-11-051-14/+3
| | | | | | | | This will enable removing the dd_function_table::DepthRange hook in the near future. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* radeon / r200: Don't pass unused parameters to radeon_viewportIan Romanick2013-11-054-4/+14
| | | | | | | | | | | The x, y, width, and height parameters aren't used by radeon_viewport, so don't pass them. This should make future changes to the dd_function_table::Viewport interface a little easier. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Acked-by: Alex Deucher <[email protected]> Cc: Courtney Goeltzenleuchter <[email protected]>
* i915: Bring sanity to the Viewport functionIan Romanick2013-11-054-28/+22
| | | | | | | | | | | The i830 and the i915 driver have the same dd_function_table::Viewport function... it just has two names and lives in two places. Using a single implementation allows cleaning up the saved_viewport nonsense too. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: Courtney Goeltzenleuchter <[email protected]>
* i965: Eliminate the saved_viewport wrapperIan Romanick2013-11-052-7/+5
| | | | | | | | | | | The i965 driver never installed a dd_function_table::Viewport function, so this wrapper never actually did anything. No piglit regressions on IVB on DRI2. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: Courtney Goeltzenleuchter <[email protected]>
* util/u_format: take normalized flag in consideration in ↵José Fonseca2013-11-051-0/+3
| | | | | | util_format_is_rgba8_variant Just happened to notice it was missing while looking at it.
* glsl: Don't generate misleading debug names when packing gs inputs.Paul Berry2013-11-041-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | Previously, when packing geometry shader input varyings like this: in float foo[3]; in float bar[3]; lower_packed_varyings would declare a packed varying like this: (declare (shader_in flat) (array ivec4 3) packed:foo[0],bar[0]) That's confusing, since the packed varying acutally stores all three values of foo and all three values of bar. This patch causes it to generate the more sensible declaration: (declare (shader_in flat) (array ivec4 3) packed:foo,bar) Note that there should be no functional change for users of geometry shaders, since the packed name is only used for generating debug output. But this should reduce confusion when using INTEL_DEBUG=gs. Reviewed-by: Eric Anholt <[email protected]>
* gallivm: Remove llvm::DisablePrettyStackTrace for LLVM >= 3.4.Vinson Lee2013-11-041-0/+2
| | | | | | | | | | | | | LLVM 3.4 r193971 removed llvm::DisablePrettyStackTrace and made the pretty stack trace opt-in rather than opt-out. The default value of DisablePrettyStackTrace has changed to true in LLVM 3.4 and newer. Signed-off-by: Vinson Lee <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60929 Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* target/haiku-softpipe: Fix viewport issuesAlexander von Gluck IV2013-11-054-29/+138
| | | | | | | | | | | | * Call mesa viewport call on winndow resize * Add initial postprocessing code * Pass hgl_context to private statetracker as it is more useful than GalliumContext * Use Lock and Unlock functions to standardize GalliumContext locking * Create texture resources in texture validation Acked-by: Brian Paul <[email protected]>
* mesa: remove __alpha__ && CCPML checkBrian Paul2013-11-041-4/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: remove OPENSTEP stuffBrian Paul2013-11-041-1/+1
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: remove macintosh preprocessor stuffBrian Paul2013-11-041-6/+6
| | | | | | IIRC, this is MacOS 9.x stuff. Reviewed-by: Matt Turner <[email protected]>
* mesa: remove WGLAPI macroBrian Paul2013-11-041-16/+0
| | | | | | WGLAPI was defined in glheader.h but wasn't used anywhere. Reviewed-by: Matt Turner <[email protected]>
* i965: Expose brw_reg_from_fs_reg() to other files.Kenneth Graunke2013-11-042-1/+3
| | | | | | This will be useful for Broadwell code as well. Signed-off-by: Kenneth Graunke <[email protected]>
* i965: Combine gen6_clip_state.c and gen7_clip_state.c.Kenneth Graunke2013-11-043-140/+42
| | | | | | | | | | The changes between Gen6-7 are minimal, and can easily be solved with an extra generation check. This cuts a lot of duplicated code. It also helps prevent even more duplication for Broadwell. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* dri/nouveau: Fix nouveau_init_screen2 breakage.Francisco Jerez2013-11-041-16/+15
| | | | | | | Fix incorrect init ordering in nouveau_init_screen2 caused by 083f66fdd6451648fe355b64b02b29a6a4389f0d. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71172
* i965/gen7: Add instruction latency estimates for untyped atomics and reads.Francisco Jerez2013-11-041-0/+39
| | | | | | | | The latency information has been obtained empirically from measurements taken on Haswell and Ivy Bridge. Acked-by: Paul Berry <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/gen7: Handle atomic instructions from the VEC4 back-end.Francisco Jerez2013-11-042-2/+110
| | | | | | | | | | | | | This can deal with all the 15 32-bit untyped atomic operations the hardware supports, but only INC and PREDEC are going to be exposed through the API for now. v2: Represent atomics as GLSL intrinsics. Add support for variably indexed atomic counter arrays. v3: Add comment on why we don't need to assign uniform storage for atomic counters. Reviewed-by: Paul Berry <[email protected]>
* i965/gen7: Handle atomic instructions from the FS back-end.Francisco Jerez2013-11-042-2/+141
| | | | | | | | | | | | | | This can deal with all the 15 32-bit untyped atomic operations the hardware supports, but only INC and PREDEC are going to be exposed through the API for now. v2: Represent atomics as GLSL intrinsics. Add support for variably indexed atomic counter arrays. Fix interaction with fragment discard. v3: Add comment on why we don't need to assign uniform storage for atomic counters. Reviewed-by: Paul Berry <[email protected]>
* i965: Add a 'has_side_effects' back-end instruction predicate.Francisco Jerez2013-11-045-17/+34
| | | | | | | | | | | | | This patch fixes the three dead code elimination passes and the VEC4/FS instruction scheduling passes so they leave instructions with side effects alone. At some point it might be interesting to have the instruction scheduler calculate the exact memory dependencies between atomic ops, but they're rare enough that it seems unlikely that it will make any practical difference. Reviewed-by: Paul Berry <[email protected]>
* clover: Calculate optimal work group size when it's not specified by the user.Francisco Jerez2013-11-045-15/+176
| | | | | | | | Inspired by a patch sent to the mailing list by Tom Stellard, but using a different algorithm to calculate the optimal block size that has been found to be considerably more effective. Reviewed-by: Tom Stellard <[email protected]>
* clover: Constify some command_queue arguments.Francisco Jerez2013-11-041-4/+4
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