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* glx: Implement GLX_ARB_context_flush_controlNeil Roberts2017-11-067-9/+62
| | | | | | | Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
* dri: Add a flush control extensionNeil Roberts2017-11-062-2/+21
| | | | | | | | | | This advertises that the driver can accept a new context attribute __DRI_CTX_ATTRIB_RELEASE_BEHAVIOR. Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
* dri: Change __DriverApiRec::CreateContext to take a struct for attribsNeil Roberts2017-11-0614-131/+152
| | | | | | | | | | | | | | | | | | | | Previously the CreateContext method of __DriverApiRec took a set of arguments to describe the attribute values from the window system API's CreateContextAttribs function. As more attributes get added this could quickly get unworkable and every new attribute needs a modification for every driver. To fix that, pass the attribute values in a struct instead. The struct has a bitmask to specify which members are used. The first three members (two for the GL version and one for the flags) are always set. If the bit is not set in the attribute mask then it can be assumed the attribute has the default value. Drivers will error if unknown bits in the mask are set. Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
* intel: Don't flush the old context in intelMakeCurrentNeil Roberts2017-11-062-18/+0
| | | | | | | | | | | | | | | | | | | It shouldn't be necessary to flush the context within the driver implementation because the old context is explicitly flushed in _mesa_make_current which is called a little further on. It is useful to only have a single place that flushes when switching contexts to make it easier to later implement the GL_KHR_context_flush_control extension. The flush in intelMakeCurrent was added in commit 5505865 to implement the GLX semantics that the context should be flushed when it is released. When the commit was made there was no flush in _mesa_make_current because it was only added later in 93102b4c. I think that later commit effectively makes the first commit redundant. Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Neil Roberts <[email protected]>
* egl/dri2: Factor out context attribute initializationAdam Jackson2017-11-061-24/+7
| | | | | | | Signed-off-by: Adam Jackson <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* etnaviv: Don't over-pad compressed texturesWladimir J. van der Laan2017-11-061-9/+15
| | | | | | | | | HALIGN_FOUR/SIXTEEN has no meaning for compressed textures, and we can't render to them anyway. So use the tightest possible packing. This avoids bugs with non-power-of-two block sizes. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: ASTC texture supportWladimir J. van der Laan2017-11-067-2/+57
| | | | | | | | Add ASTC texture support for hardware that supports this (currently only GC3000 on i.MX6qp is known to have this). Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: Update from rnndbWladimir J. van der Laan2017-11-0613-320/+1015
| | | | | | | Updated as of etnav_viv commit 3b4a8ec. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* radv: add initial copy descriptor support. (v2)Dave Airlie2017-11-061-2/+53
| | | | | | | | | | | | It appears the latest dota2 vulkan uses this, and we get a hang in VR mode without it. v2: remove finishme I left in after finishing. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]> Cc: "17.2 17.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* gallium/u_vbuf: use signed vertex buffers offsets for optimal uploadsMarek Olšák2017-11-061-2/+10
| | | | | | | | | | | | | | | Uploaded data must start at (stride * start), because we can't modify start in all cases. If it's the first allocation, it's also the amount of memory wasted. If the starting offset is larger than the size of the upload buffer, the buffer is re-created, used for 1 upload, and then thrown away. If the upload is small, most of the buffer space is unused and wasted. Keep doing that and the OOM killer comes. It's actually pretty quick. With signed VB offsets, we can set min_out_offset = 0 in u_upload_alloc/u_upload_data. This fixes OOM situations with SPECviewperf.
* radeonsi: enable signed vertex buffer offsetsMarek Olšák2017-11-062-15/+12
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* gallium: add PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSETMarek Olšák2017-11-0618-0/+21
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* automake: include git_sha1.h.in in release tarballJuan A. Suarez Romero2017-11-061-1/+1
| | | | | | | | | | | | Fixes: make[2]: Leaving directory '/home/local/mesa/mesa-17.4.0-devel/_build/sub/src' make[2]: *** No rule to make target '../../../src/git_sha1.h.in', needed by 'git_sha1.h'. Stop. Makefile:660: recipe for target 'all-recursive' failed Fixes: 16be271c6ee618e79c7d "git_sha1_gen: use git_sha1.h.in on all build systems" Reviewed-by: Eric Engestrom <[email protected]> Signed-off-by: Juan A. Suarez Romero <[email protected]>
* radeonsi: don't map big VRAM buffers for the first upload directlyMarek Olšák2017-11-062-0/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_threaded: don't map big VRAM buffers for the first upload directlyMarek Olšák2017-11-063-2/+28
| | | | | | | This improves Paraview "many spheres" performance 4x along with the radeonsi commit. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_threaded: clean up tc_improve_map_buffer_flags and prevent reentryMarek Olšák2017-11-061-7/+12
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: move descriptor sets out of cmd_state.Dave Airlie2017-11-063-17/+20
| | | | | | | | | | | Instead of storing all the pointers and zeroing them all out, just store a valid bitmask in the state. This also moves the CmdBindPipeline path down the cpu usage path for the multithreading demo as it no longer has to traverse MAX_SETS to find the active descriptor sets. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add helper for setting a descriptor.Dave Airlie2017-11-063-10/+17
| | | | | | | This is just a simple refactor. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move vertex binding out of cmd state.Dave Airlie2017-11-062-4/+4
| | | | | | | | | This isn't required to be cleared, since buffers are only linked by vertex elements, so if elements are clear then no buffers should be referenced. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: reorder cmd_state to remove a hole.Dave Airlie2017-11-061-1/+1
| | | | | | | | This just removes a hole in the cmd_state and packs some bools together. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: free attachments on end command buffer.Dave Airlie2017-11-061-0/+2
| | | | | | | | | | | | | | If we allocate attachments in the begin command buffer due to the render pass continue bit, we were leaking them. Since renderpasses inside a cmd buffer malloc/free these properly, and set to NULL, we just need to call free at end. Fixes a memory leak with multithreading demo. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.2 17.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Optimize calling radv_save_descriptors.Bas Nieuwenhuizen2017-11-041-4/+2
| | | | | | | | uint32_t data[MAX_SETS * 2] = {}; was getting executed before the exit and took significant amounts of time. By having the check outside the function, we skip the execution of the clear. Reviewed-by: Dave Airlie <[email protected]>
* radv: Use an array to store descriptor sets.Bas Nieuwenhuizen2017-11-042-26/+50
| | | | | | | | | | | | The vram_list linked list resulted in lots of pointer chasing. Replacing this with an array instead improves descriptor set allocation CPU usage by 3x at least (when also considering the free), because it had to iterate through 300-400 sets on average. Not a huge improvement as the pre-improvement CPU usage was only about 2.3% in the busiest thread. Reviewed-by: Dave Airlie <[email protected]>
* nv50,nvc0: Display shared memory usage in pipe_debug_messagePierre Moreau2017-11-042-6/+8
| | | | Signed-off-by: Pierre Moreau <[email protected]>
* nv50,nvc0: Copy shared memory per block to the program info structure and backPierre Moreau2017-11-042-0/+4
| | | | | | | | In OpenCL/CUDA kernels, shared memory usage can be defined within the kernel code. Those usage will only be picked up while parsing the SPIR-V, during the translation phase of the program. Signed-off-by: Pierre Moreau <[email protected]>
* nv50/ir: Store shared memory per block in nv50_ir_prog_infoPierre Moreau2017-11-041-0/+1
| | | | Signed-off-by: Pierre Moreau <[email protected]>
* i965/gen10: Implement Wa3DStateModeAnuj Phogat2017-11-032-0/+16
| | | | | | | | | | | | | | This workaround doesn't fix any of the piglit hangs we've seen on CNL. But it might be fixing something we haven't tested yet. V2: Remove the bits enabling Float blend optimization. It is enabled through CACHE_MODE_SS register. Update the comment. Move gen10 if block on top of gen9 if block. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* i965/gen10: Enable float blend optimizationAnuj Phogat2017-11-032-0/+9
| | | | | | | | | This optimization is enabled for previous generations too. See Mesa commit c17e214a6b On CNL this bit has been moved to CACHE_MODE_SS register. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* i965/gen10: Implement WaForceRCPFEHangWorkaroundAnuj Phogat2017-11-031-0/+23
| | | | | | | | | | | | | This workaround doesn't fix any of the piglit hangs we've seen on CNL. But it might be fixing something we haven't tested yet. V2: Add the check for Post Sync Operation. Update the workaround comment. Use braces around if-else. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* i965/gen10: Implement WaSampleOffsetIZ workaroundAnuj Phogat2017-11-032-0/+50
| | | | | | | | | | | | | | | | | | | | | | | There are few other (duplicate) workarounds which have similar recommendations: WaFlushHangWhenNonPipelineStateAndMarkerStalled WaCSStallBefore3DSamplePattern WaPipeControlBefore3DStateSamplePattern WaPipeControlBefore3DStateSamplePattern has some extra recommendations if driver is using mid batch context restore. Ignoring it for now because We're not doing mid-batch context restore in Mesa. This workaround doesn't fix any of the piglit hangs we've seen on CNL. But it might be fixing something we haven't tested yet. V2: Use brw_load_register_imm32() to program CACHE_MODE_0. Get rid of brw_flush_gpu_caches(). V3: Make the workaround helper functions static. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Reviewed-by :Nanley Chery <[email protected]>
* i965/gen10: Don't set Antialiasing Enable in 3DSTATE_RASTER if num_samples > 1Anuj Phogat2017-11-031-0/+10
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen10: Don't set Smooth Point Enable in 3DSTATE_SF if num_samples > 1Anuj Phogat2017-11-031-1/+12
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.Andrey Grodzovsky2017-11-034-0/+15
| | | | | | | | | | Fixes reverted patch f03b7c9 by doing VMID reservation per process and not per context. Also updates required amdgpu libdrm version since the change involved interface updates in amdgpu libdrm. Signed-off-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* i965: perf: list registers to program for queriesLionel Landwerlin2017-11-032-0/+66
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: perf: factorize code for availabilityLionel Landwerlin2017-11-031-12/+16
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: perf: make revision variable availableLionel Landwerlin2017-11-035-8/+10
| | | | | | | This will be used in the next commit to build up register programming. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: fix interpolateAtXxx(some_vec[idx], ...) with dynamic idxNicolai Hähnle2017-11-031-1/+30
| | | | | | | | | | | | | The dynamic index of a vector (not array!) is lowered to a sequence of conditional assignments. However, the interpolate_at_* expressions require that the interpolant is an l-value of a shader input. So instead of doing conditional assignments of parts of the shader input and then interpolating that (which is nonsensical), we interpolate the entire shader input and then do conditional assignments of the interpolated result. Reviewed-by: Timothy Arceri <[email protected]>
* glsl: allow any l-value of an input variable as interpolant in interpolateAt*Nicolai Hähnle2017-11-032-5/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | The intended rule has been clarified in GLSL 4.60, Section 8.13.2 (Interpolation Functions): "For all of the interpolation functions, interpolant must be an l-value from an in declaration; this can include a variable, a block or structure member, an array element, or some combination of these. Component selection operators (e.g., .xy) may be used when specifying interpolant." For members of interface blocks, var->data.must_be_shader_input must be determined on-the-fly after lowering interface blocks, since we don't want to disable varying packing for an entire block just because one input in it is used in interpolateAt*. v2: keep setting must_be_shader_input in ast_function (Ian) v3: follow the relaxed rule of GLSL 4.60 v4: only apply the relaxed rules to desktop GL (the ES WG decided that the relaxed rules may apply in a future version but not retroactively; see also dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_centroid.negative.*) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101378 Reviewed-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Timothy Arceri <[email protected]>
* nir/serialize: fix build with gcc 4.4.7Dave Airlie2017-11-031-19/+19
| | | | | | | I had to build on RHEL6 today, and noticed this. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i915g: remove some unknown cap warnings.Dave Airlie2017-11-031-0/+8
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* i915g: make gears run again.Dave Airlie2017-11-034-4/+24
| | | | | | | We need to validate some structs exist before we dirty the states, and avoid the problem in some other places. Fixes: e027935a7 ("st/mesa: don't update unrelated states in non-draw calls such as Clear")
* ac: remove the remaining duplicate llvm typesTimothy Arceri2017-11-031-12/+1
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: remove usused v4f32Timothy Arceri2017-11-031-4/+0
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: add v2f32 to the common code and make use of itTimothy Arceri2017-11-033-10/+7
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac f16 llvm typeTimothy Arceri2017-11-031-3/+1
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac f32 llvm typeTimothy Arceri2017-11-031-35/+33
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac f64 llvm typeTimothy Arceri2017-11-031-3/+1
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the common v8i32 llvm typeTimothy Arceri2017-11-031-4/+2
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the common v4i32 llvm typeTimothy Arceri2017-11-031-9/+7
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: add v3i32 to the common code and make use of itTimothy Arceri2017-11-033-5/+5
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
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