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* anv: Flush caches prior to PIPELINE_SELECT on all gensJason Ekstrand2017-03-301-2/+1
| | | | | | | | | | | | | | | | | The programming note that says we need to do this still exists in the SkyLake PRM and, from looking at the bspec, seems like it may apply to all hardware generations SNB+. Unfortunately, this isn't particularly clear cut since there is also language in the bspec that says you can skip the flushing and stall to get better throughput. Experimentation with the "Car Chase" benchmark in GL seems to indicate that some form of flushing is still needed. This commit makes us do the full set of flushes regardless of hardware generation. We can always reduce the flushing later. Reported-by: Topi Pohjolainen <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 6baae9625d26d282a72481598f9431fcad3211f6)
* anv/cmd_buffer: Fix bad indentationJason Ekstrand2017-03-301-24/+25
| | | | | | | | | A bunch of code was indented in such a way that it looked like it went with the if statement above but it definitely didn't. Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 0fe3dcce4c3e8b86a60beefe4c5adc760f2d59f8)
* anv/cmd_buffer: Apply flush operations prior to executing secondariesJason Ekstrand2017-03-301-0/+5
| | | | | | | | | | | | | This fixes rendering issues in the Vulkan port of skia on some hardware. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "13.0 17.0" <[email protected]> (cherry picked from commit 01a65dc43be3a4bf6b8a901586f7222218f4b6b3) [Andres Gomez: resolve trivial conflicts] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/intel/vulkan/genX_cmd_buffer.c
* anv/blorp: Use anv_get_layerCount everywhereJason Ekstrand2017-03-301-8/+12
| | | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "13.0 17.0" <[email protected]> (cherry picked from commit 9319ef96fd5c2489754eae1b058e4087d7259341)
* anv: Make anv_get_layerCount a macroJason Ekstrand2017-03-301-7/+6
| | | | | | | | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "13.0 17.0" <[email protected]> (cherry picked from commit 1b8fa8dd794c22aba43b16470e75ecaebf902b11) [Andres Gomez: resolve trivial conflicts] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/intel/vulkan/anv_private.h
* mesa: update lower_jumps tests after bug fixTimothy Arceri2017-03-291-2/+15
| | | | | | | | | | | | This change updates the tests to reflect the IR after the following bug fix. Fixes: c1096b7f1d49 ("glsl: fix lower jumps for returns when loop is inside an if") Tested-by: Michel Dänzer <[email protected]> Bugzilla: https://bugs.freedesktop.org/100441 (cherry picked from commit e44cba540ee7a07bba643bab4b9e519e90244bd1)
* tests/cache_test: allow crossing mount pointsJuan A. Suarez Romero2017-03-291-1/+1
| | | | | | | | | | | | When using an overlayfs system (like a Docker container), rmrf_local() fails because part of the files to be removed are in different mount points (layouts). And thus cache-test fails. Letting crossing mount points is not a big problem, specially because this is just for a test, not to be used in real code. Reviewed-by: Nicolai Hähnle <[email protected]> (cherry picked from commit caa616ccc4384ea1479865e12b56cf816561a827)
* glsl: on UBO/SSBOs link error reset the number of active blocks to 0Andres Gomez2017-03-291-0/+6
| | | | | | | | | | | | | | While it's legal to have an active blocks count > 0 on link failure. Unless we actually assign memory for the blocks array we can end up segfaulting in calls such as glUniformBlockBinding(). To avoid having to NULL check these api calls we simply reset the block count to 0 if the array was not created. Signed-off-by: Andres Gomez <[email protected]> Cc: Timothy Arceri <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> (cherry picked from commit bf15b2b515d5f37fc67fea77dea9d2fbc1dc8bf1)
* anv/query: Fix the location of timestamp availabilityJason Ekstrand2017-03-291-1/+1
| | | | | | | | | | | Reviewed-By: Lionel Landwerlin <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 4bbb4b95b8ba02693f5e6990b983ebb66dc6241a) [Andres Gomez: use genX_cmd_buffer.c instead of genX_query.c] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/intel/vulkan/genX_query.c
* radv: flush DB cache before and after HTILE decompress.Bas Nieuwenhuizen2017-03-291-0/+6
| | | | | | | | | | | | | | | | | It reads @ writes the DB cache, and we haven't flushed dst caches yet, so DB cache may be stale. Also the user might be shader read (and probably is), so also flush after. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> CC: <[email protected]> Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver") (cherry picked from commit a8c51b1cd9168b621e27cf5308d0dd8fc08f8a4a) [Andres Gomez: resolve trivial conflicts] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/amd/vulkan/radv_cmd_buffer.c
* glsl: fix lower jumps for returns when loop is inside an ifTimothy Arceri2017-03-291-5/+12
| | | | | | | | | | | | | | | | | | Previously we would just escape the loop and move everything following the loop inside the if to the else branch of a new if with a return flag conditional. However everything outside the if the loop was nested in would still get executed. Adding a new return to the then branch of the new if fixes this and we just let a follow pass clean it up if needed. Fixes: tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop.shader_test tests/spec/glsl-1.10/execution/vs-nested-return-sibling-loop2.shader_test Cc: "13.0 17.0" <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> (cherry picked from commit c1096b7f1d49f33c85b1042f82ccb063f63e7c20)
* i965/fs: Don't emit SEL instructions for type-converting MOVs.Matt Turner2017-03-291-0/+2
| | | | | | | | | | | | SEL can only convert between a few integer types, which we basically never do. Fixes fs/vs-double-uniform-array-direct-indirect-non-uniform-control-flow Cc: [email protected] Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Acked-by: Francisco Jerez <[email protected]> (cherry picked from commit 7dccd38b400d3a65da20ddefe282a7bb0b7ccb58)
* anv/blorp: Fix a crash in CmdClearColorImageXu Randy2017-03-291-2/+2
| | | | | | | | | | | | | | We should use anv_get_layerCount() to access layerCount of VkImageSub- resourceRange in anv_CmdClearColorImage and anv_CmdClearDepthStencil- Image, which handles the VK_REMAINING_ARRAY_LAYERS (~0) case. Test: Sample multithreadcmdbuf from LunarG can run without crash Signed-off-by: Xu Randy <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "13.0 17.0" <[email protected]> (cherry picked from commit 004468de14170dc7a22322301829ad4f59188ee5)
* st/nine: Use atomics for available_texture_memAxel Davy2017-03-291-2/+2
| | | | | | | | | | Resource dtor can be executed in the worker thread. Use atomic to avoid threading safety issues. CC: "17.0" <[email protected]> Signed-off-by: Axel Davy <[email protected]> Tested-by: James Harvey <[email protected]> (cherry picked from commit bdf035ea6f784b90a6cbfd4ce16f3188ab15b2d3)
* st/nine: Resolve deadlock in surface/volume dtors when using csmtAxel Davy2017-03-293-5/+17
| | | | | | | | | | | | | | | | | | | | | Surfaces and Volumes can be freed in the worker thread. Without this patch, pending_uploads_counter could be non-zero in the Surfaces or Volumes dtor, leading to deadlock. Instead decrease properly the counter before releasing the item. Also avoid another potential deadlock if the item is not properly unlocked: Do not call UnlockRect which will cause deadlock, but free directly using the deadlock safe nine_context_get_pipe_multithread. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99246 CC: "17.0" <[email protected]> Signed-off-by: Axel Davy <[email protected]> Tested-by: James Harvey <[email protected]> (cherry picked from commit bd85bb51c717a1858157c73adcb689e3986b2134)
* freedreno: fix memory leakRob Clark2017-03-291-0/+2
| | | | | | | | | | | | | | Otherwise blitter would still hold a ref to, for example, sampler- views. To reproduce: glmark2 -b desktop:duration=2 --run-forever Fixes: a8e6734 ("freedreno: support for using generic clear path") Cc: "13.0 17.0" <[email protected]> Signed-off-by: Rob Clark <[email protected]> (cherry picked from commit c03f6f12bbe6fb491c9362b3fd5d39b9f4fd05fd)
* clover: use pipe_resource referencesJan Vesely2017-03-292-3/+9
| | | | | | | | | | | | v2: buffers are created with one reference. v3: add pipe_resource reference to mapping object v4: rename to pres and drop inline initializers CC: "17.0 13.0" <[email protected]> Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> (cherry picked from commit 14b543bdc94df06897f98057c40df84b16f2e944)
* radeonsi: don't hang on shader compile failureMarek Olšák2017-03-291-1/+1
| | | | | | | Cc: 17.0 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> (cherry picked from commit 518d8341627ac80f8757fd09cc3cd5c2884f58e0)
* swr: [rasterizer jitter] fix llvm >= 5.0 build breakTim Rowley2017-03-293-3/+3
| | | | | | | | | Function::getArgumentList() doesn't exist anymore, switch to using arg_begin() (existed back to at least llvm-3.6.0). Reviewed-by: Vedran Miletić <[email protected]> CC: <[email protected]> (cherry picked from commit 08f864abd9e241c7db9c99212a66cdad69bdd4d8)
* anv/image: Return early when unbinding an imageJason Ekstrand2017-03-291-4/+5
| | | | | | | | | | Found by inspection. Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit c942faf8f37d14e7934a21c15ad2438dde2d501e)
* mesa/main: fix MultiDrawElements[BaseVertex] validation of primcountNicolai Hähnle2017-03-292-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | primcount must be a GLsizei as in the signature for MultiDrawElements or bad things can happen. Furthermore, an error should be flagged when primcount is negative. Curiously, this code used to work somewhat correctly even when primcount was negative, because the loop that checks count[i] would iterate out of bounds and almost certainly hit a negative value at some point. Found by an ASAN error in GL45-CTS.gtf32.GL3Tests.draw_elements_base_vertex.draw_elements_base_vertex_primcount Note that the OpenGL spec seems to have s/primcount/drawcount/ at some point, and the code still reflects the old language. v2: provide the correct spec quotes (pointed out by Ian) Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]> (v1) Reviewed-by: Ian Romanick <[email protected]> (cherry picked from commit c11dcfb5e9b051b9036949b3e40a9dc15138bd97)
* i965: Fall back to GL 4.2/4.3 on Haswell if the kernel isn't new enough.Kenneth Graunke2017-03-291-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit d2590eb65ff28a9cbd592353d15d7e6cbd2c6fc6 I enabled GL 4.5 on Haswell...but failed to check if we could do indirect compute shader dispatch...and query buffer objects. Indirect compute shader dispatch requires command parser version 5 (kernel commit 7b9748cb513a6bef4af87b79f0da3ff7e8b56cd8, which is in Linux v4.4). On earlier kernels we would have disabled ARB_compute_shader, which is a mandatory part of OpenGL 4.3+. Query buffer objects currently require MI_MATH and MI_LOAD_REGISTER_REG, which mean command parser version 7 (Linux v4.8). On earlier kernels we would have disabled ARB_query_buffer_object, which is a mandatory part of OpenGL 4.4+. The new version support looks like: - Kernel 4.1 and older => OpenGL 3.3 - Kernel 4.2-4.3 => OpenGL 4.2 - Kernel 4.4-4.7 => OpenGL 4.3 - Kernel 4.8+ => OpenGL 4.5 Cc: "17.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> (cherry picked from commit 9b324e4dca4754801e5db59aba0ab559f2cf35ea)
* intel: Correct the BDW surface state sizeNanley Chery2017-03-292-4/+3
| | | | | | | | | | | | The PRMs state that this packet is 16 DWORDS long. Ensure that the last three DWORDS are zeroed as required by the hardware when allocating a null surface state. Cc: <[email protected]> Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> (cherry picked from commit 7c50f9903f58ef04ff393505a383d06f499f1fdc)
* anv/genX: Solve the vkCreateGraphicsPipelines crashXu,Randy2017-03-291-2/+2
| | | | | | | | | | | | | The crash is due to NULL pColorBlendState, which is legal if the pipeline has rasterization disabled or if the subpass of the render pass the pipeline is created against does not use any color attachments. Test: Sample subpasses from LunarG can run without crash Signed-off-by: Xu,Randy <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 57595cb0739d50a3fbd0841d7475bd775f3e24f3)
* radv: fix primitive reset index emissionDave Airlie2017-03-291-1/+1
| | | | | | | | | | | This was meant to be checking the index type to get the correct index not the last emitted one. This fixes: dEQP-VK.pipeline.input_assembly.primitive_restart.index_type_uint32.triangle_strip_with_adjacency Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit d06e168b878be45029bf66c2ac627d16144a7823)
* st/mesa: set result writemask based on ir typeIlia Mirkin2017-03-291-0/+1
| | | | | | | | | | | This prevents textureQueryLevels, which maps as LODQ, from ending up with a xyzw writemask, which is illegal. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100061 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit dab88e9af7a35ebcdd0fc87df97f4b13e908552a)
* nvc0/ir: treat FMA like MAD for operand propagationKarol Herbst2017-03-291-0/+1
| | | | | | | | | | | | | | | | | | | Helps mainly Feral-ported games, due to their use of fma() shader-db changes: total instructions in shared programs : 3901147 -> 3842505 (-1.50%) total gprs used in shared programs : 471258 -> 467359 (-0.83%) total local used in shared programs : 27405 -> 27361 (-0.16%) total bytes used in shared programs : 35749888 -> 35214176 (-1.50%) local gpr inst bytes helped 17 1829 4091 4091 hurt 4 44 3 3 Signed-off-by: Karol Herbst <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: [email protected] (cherry picked from commit 09f16de7e624938d46a63b8285fc5b21050962e9)
* anv/GetQueryPoolResults: Actually implement the specJason Ekstrand2017-03-291-16/+36
| | | | | | | | | | | | | | | | | | | | The Vulkan spec is fairly clear about when we should and should not write query pool results. We're also supposed to return VK_NOT_READY if VK_QUERY_RESULT_PARTIAL_BIT is not set and we come across any queries which are not yet finished. This fixes rendering corruptions on The Talos Principle where geometry flickers in and out due to bogus query results being returned by the driver. These issues are most noticable on Sky Lake GT4 2hen running on "ultra" settings. Reviewed-By: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100182 Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 08df015b9de8ccb16ce6db93890910f8a02be4c6) [Andres Gomez: use anv_query.c instead of genX_query.c] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/intel/vulkan/genX_query.c
* anv/query: Invalidate the correct rangeJason Ekstrand2017-03-291-2/+6
| | | | | | | | | | | Reviewed-By: Lionel Landwerlin <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 81840130c0f147ed6ae4c26872c2f04a2167bc54) [Andres Gomez: use anv_query.c instead of genX_query.c] Signed-off-by: Andres Gomez <[email protected]> Conflicts: src/intel/vulkan/genX_query.c
* i965/gen8+: Do full stall when switching pipelineTopi Pohjolainen2017-03-291-1/+2
| | | | | | | | | | just as earlier gens do. CC: "17.0 13.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96743 Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]> (cherry picked from commit bd25d9670b466043cdb5d9668f82accbd587c889)
* Revert "radv: Emit cache flushes before CP DMA."Bas Nieuwenhuizen2017-03-171-3/+0
| | | | | | | | | This reverts commit cce43f6d8c40222099badaf52344d6a0eed993f3. Redundant, as the flush already happens at si_cp_dma_prepare. Acked-by: Dave Airlie <[email protected]> (cherry picked from commit ad4dee521d7968a88393dc3685e7c593d27efba5)
* radv/ac: Fix shared memory offset calculationAlex Smith2017-03-171-1/+1
| | | | | | | | | | | | The index passed to get_shared_memory_ptr is an attribute slot index, i.e. the index of a vec4 within LDS. Therefore this must be scaled by sizeof(vec4) to give the LDS byte offset. Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver") Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> CC: <[email protected]> (cherry picked from commit ce4058dafd2dd283addaa99e8d5b51e53f634f9b)
* radv: Fix using more than 4 bound descriptor setsJames Legg2017-03-171-1/+3
| | | | | | | | | Avoid a buffer overflow in ac_nir_to_llvm.c's create_function when using more than 4 descriptor sets. radv claims support for 8. Cc: 17.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (cherry picked from commit e88cac1df03d01a9e8a1de1a4a2ee888149e727a)
* radeonsi: disable sinking common instructions down to the end blockSamuel Pitoiset2017-03-171-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initially this was a workaround for a bug introduced in LLVM 4.0 in the SimplifyCFG pass that caused image instrinsics to disappear (because they were badly sunk). Finally, this is a win because it decreases SGPR spilling and increases the number of waves a bit. Although, shader-db results are good I think we might want to remove it in the future once the issue is fixed. For now, enable it for LLVM >= 4.0. This also fixes a rendering issue with the speedometer in Dirt Rally. More information can be found here https://reviews.llvm.org/D26348. Thanks to Dave Airlie for the patch. v2: - add a FIXME comment - use if (HAVE_LLVM >= 0x0400) instead Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99484 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97988 Signed-off-by: Samuel Pitoiset <[email protected]> Cc: 17.0 <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (cherry picked from commit 7751ed39e40e08e5aa0633d018c9f25ad17f9bb0) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
* radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBufferAlex Smith2017-03-161-0/+2
| | | | | | | | | | | | | | | | Need to flush before updating the buffer to ensure that the copy is ordered after previous accesses (assuming the app has performed the appropriate barriers). This fixes potential issues due to draws prior to an update reading the new buffer content, despite having the necessary barriers between them. Signed-off-by: Alex Smith <[email protected]> Cc: 17.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit e0cc32b85bd8cf5c2202037838a208983e2d793a)
* radv: Emit cache flushes before CP DMA.Bas Nieuwenhuizen2017-03-161-0/+3
| | | | | | | | | The flushes could be due to TRANSFER barriers. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: 17.0 <[email protected]> Reviewed-by: Dave Airlie <[email protected]> (cherry picked from commit cce43f6d8c40222099badaf52344d6a0eed993f3)
* nir/intrinsics: Make load_barycentric_input take a 2-component coorJason Ekstrand2017-03-161-1/+3
| | | | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 60d1aac28a1f44ac166e72262e378e063155d6fd)
* anv/blorp: Only set a clear color for resolves if fast-clearedJason Ekstrand2017-03-161-1/+2
| | | | | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Cc: "17.0" <[email protected]> (cherry picked from commit 678fd00f2f5b213d0317ba51a8163c4c5bd1f3dc)
* anv/blorp: Turn off AUX after doing a CCS_D resolveJason Ekstrand2017-03-161-0/+2
| | | | | | | | | | | For render passes with multiple subpasses on gen7, we only fast-clear at the top but an input attachment use can cause us to do a resolve in the middle of the render pass. Once we've done so, we are no longer have a fast-cleared surface so we can just set aux_usage to NONE. Reviewed-by: Topi Pohjolainen <[email protected]> Cc: "17.0" <[email protected]> (cherry picked from commit 273b720310863c2084c55f1371b2d27c2d96dbda)
* clover: Work around build failure with AltiVec.Matt Turner2017-03-161-0/+3
| | | | | | | Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=587210 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68504 Acked-by: Francisco Jerez <[email protected]> (cherry picked from commit 7d1195c1e4d071fe796bf5f210c468ea1cc86225)
* nvc0: increase alignment to 256 for texture buffers on fermiIlia Mirkin2017-03-161-1/+3
| | | | | | | | | | | When binding as textures, the alignment can be 16. However when binding as an image, the address has to be aligned to 256. (Also when binding as an RT, but that can't happen with GL or current gallium APIs.) Reported-by: Roy Spliet <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 32dd8d59b6d1b6828e16e854d589d0f04536da14)
* glapi: fix typo in count_scaleGregory Hainaut2017-03-161-1/+1
| | | | | | | | | 2*4=8 Signed-off-by: Gregory Hainaut <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 2ab5eccf5de4a68d0d8d2668f6c5244cc6a41846)
* vulkan/wsi: Improve the DRI3 error messageJacob Lifshay2017-03-161-10/+41
| | | | | | | | | | | | | | | | | | This commit improves the message by telling them that they could probably enable DRI3. More importantly, it includes a little heuristic to check to see if we're running on AMD or NVIDIA's proprietary X11 drivers and, if we are, doesn't emit the warning. This way, users with both a discrete card and Intel graphics don't get the warning when they're just running on the discrete card. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99715 Co-authored-by: Jason Ekstrand <[email protected]> Reviewed-by: Kai Wasserbäch <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Rene Lindsay <[email protected]> Acked-by: Dave Airlie <[email protected]> Cc: "17.0" <[email protected]> (cherry picked from commit 3d8feb38e8fdbc05b591164cb934b48a495adfbc)
* anv: Properly handle destroying NULL devices and instancesJason Ekstrand2017-03-161-0/+6
| | | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit e3d33a23e6cbe2b73b412a56bb4fc4aa6852d081)
* anv/image: Remove extra dependency on HiZ-specific variableNanley Chery2017-03-161-2/+7
| | | | | | | | | | | | | | | | | surf_usage is only useful to image views that may use HiZ buffers. Storage image views don't use HiZ buffers. v2: Update commit message and add an assertion. Fixes: 055ff2ec521 ("anv: Replace anv_image_has_hiz() with ISL_AUX_USAGE_HIZ") Signed-off-by: Nanley Chery <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 258af3a856328934d30b7cdf626d5fdba76852f2) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/intel/vulkan/anv_image.c
* radv: setup llvm target data layoutDave Airlie2017-03-161-0/+7
| | | | | | | | | | | | | | | | | | | | Ported from radeonsi, pointed out by Tom. "This prevents LLVM from using sext instructions for local memory offsets and allows the backend to fold immediate offsets into the instruction. This also prevents some incorrect code generation for ptrtoint and inttoptr instructions." Cc: "13.0 17.0" <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit b8ee70384adc3286d18febba7a92047118cc0f0f) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/amd/common/ac_nir_to_llvm.c
* radeonsi: mark all bound shader buffer ranges as initializedMarek Olšák2017-03-161-0/+3
| | | | | | | | | This should prevent cases when a buffer was incorrectly mapped without synchronization just because this wasn't done. Cc: 13.0 17.0 <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 71a2e4e9452a6890197f8b629b2d8359bdd58913)
* anv: Stall before fast-clear operationsJason Ekstrand2017-03-161-6/+19
| | | | | | | | | | | | | | | | During initial CCS bring-up, I discovered that you have to do a full CS stall prior to doing a CCS resolve as well as afterwards. It appears that the same is needed for fast-clears as well. This fixes rendering corruptions on The Talos Principle on Sky Lake GT4. The issue hasn't been demonstrated on any other hardware however, given that this appears to be a "too many things in the pipe" problem, having it be easier to reproduce on a system with more EUs makes sense. The issues with resolves is demonstrable on a GT3 or GT2 so this is probably also a problem on all GTs. Reviewed-by: Topi Pohjolainen <[email protected]> Cc: "13.0 17.0" <[email protected]> (cherry picked from commit 6b644e571e2344691e4d58ff0bba3ddc059c1a5d)
* anv: Accurately advertise dynamic descriptor limitsJason Ekstrand2017-03-161-2/+2
| | | | | | | | | | | The number of dynamic descriptors is limited by both the number of descriptors and the total number of dynamic things. Because there isn't a single "maximum dynamic things" limit, we need to divide by two so that they can create the maximum of both UBOs and SSBOs. Reviewed-by: Eduardo Lima Mitev <[email protected]> Cc: "17.0 13.0" <[email protected]> (cherry picked from commit 5e44ef4a76d9a3681fb6be605319250d4ab800ee)
* i965: move brw_define.h ifndef guard to the topEmil Velikov2017-03-161-3/+3
| | | | | | | | | | | | Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 077078ce77e8653725def01ed291eb486989a9ad) [Emil Velikov: resolve trivial conflicts] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/mesa/drivers/dri/i965/brw_defines.h
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 04:37:03 +0000