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* nir: return progress from lower_idivRob Clark2016-05-152-7/+16
| | | | | | | | | | With algebraic-opt support for lowering div to shift, the driver would like to be able to run this pass *after* the main opt-loop, and then conditionally re-run the opt-loop if this pass actually lowered some- thing. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* freedreno/ir3: lower fdivRob Clark2016-05-151-0/+1
| | | | | | | Not sure how we didn't hit this already, but since we want fdiv converted into mul + rcp, we should set this. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: handle VARYING_SLOT_PNTCRob Clark2016-05-151-0/+12
| | | | | | | In the glsl->tgsi path, this already gets translated to VAR8, which matches up with rasterizer->sprite_coord_enable. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: disable TGSI specific hacks in nir caseRob Clark2016-05-154-2/+7
| | | | | | | When we got NIR directly from state tracker (vs using tgsi_to_nir) we need to realize this and skip some TGSI specific hacks. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add support for NIR as preferred IRRob Clark2016-05-156-18/+61
| | | | | | For now under debug flag, since only suitable for debugging/testing. Signed-off-by: Rob Clark <[email protected]>
* nir: fix comment typo about f2d/d2fRob Clark2016-05-151-2/+2
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nv50/ir: avoid asserts when the state tracker feeds us bogus inputsIlia Mirkin2016-05-151-12/+48
| | | | | | | | | | | | | | | | | | INTERP is defined (by me) to have to have a INPUT source. However the state tracker does not always obey this. This happens due to varying packing logic introducing additional mov's which can't always be undone. Instead of just giving up, we instead try harder to find the original input. This won't always be possible, for example with indirect accesses. There's not much we can (easily) do about that though. This fixes the remaining interpolateAt* failures in dEQP: dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at* some of which were asserting due to INTERP_* being passed a non-input. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0: don't try to go through the push path for indirect drawsIlia Mirkin2016-05-151-1/+2
| | | | | | | | | | | | | | This fixes dEQP-GLES31.functional.draw_indirect.draw_elements_indirect.*.default_attribute These tests were causing a const vbo to be set up, and were small enough draws that the logic was trying to go via the push path (which emits data directly into the cmd stream rather than uploading a user vbo). Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEXIlia Mirkin2016-05-151-0/+14
| | | | | | | | | | | | | This was handled in handleTEX(), however the way the logic works, those extra arguments aren't added on by then, so it did nothing. Instead we must duplicate that bit here. GK110 appears to complain about MISALIGNED_GPR, however it's reasonable to believe that GK104 has the same requirements. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95403 Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected] Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50,nvc0: add support for cull distancesTobias Klausmann2016-05-1510-11/+33
| | | | | | | | | | | Cull distances are just a special case of clip distances as far as the hardware is concerned. Make sure that the relevant "planes" are enabled, and flip the clip mode to cull for those. Signed-off-by: Tobias Klausmann <[email protected]> [imirkin: add enables on nvc0, add nv50 support] Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tobias Klausmann <[email protected]>
* st/mesa: disable cull distance for nowIlia Mirkin2016-05-151-1/+1
| | | | | | | | | The pass that st/mesa relies on to combine clip and cull distances has been reverted, so we can't expose ARB_cull_distance until that is resolved. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Use blorp for all clearsJason Ekstrand2016-05-145-634/+0
| | | | | | | We used to use a meta path on gen8 but we haven't since c7cf17ae758. We might as well delete the meta path since blorp works on all gens. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Use blorp for all stencil blitsJason Ekstrand2016-05-145-547/+1
| | | | | | | We used to use a meta path because blorp didn't support 16x MSAA. Now it does, so we don't need the meta paths anymore. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Use blorp for all updownsample blitsJason Ekstrand2016-05-145-178/+10
| | | | | | | We used to use a meta path because blorp didn't support 16x MSAA. Now it does, so we don't need the meta paths anymore. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add support for 16x MSAAJason Ekstrand2016-05-141-1/+76
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: move brw_meta_set_fast_clear_color to brw_meta_util.cJason Ekstrand2016-05-142-75/+74
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965; Move brw_meta_get_*_rect to brw_meta_util.cJason Ekstrand2016-05-142-180/+180
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move brw_is_color_fast_clear_compatible to brw_meta_utilJason Ekstrand2016-05-142-59/+61
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Move brw_get_rb_for_slice to brw_meta_utilJason Ekstrand2016-05-144-49/+52
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Get rid of the blorp_prog_data_int() helperJason Ekstrand2016-05-144-26/+2
| | | | | | | | | The helper was initially created to allow us to set reasonable defaults as we mutated the brw_blorp_prog_data structure in preparation for NIR. Now that everything is going through brw_blorp_compile_nir_shader() which fully fills out the brw_blorp_prog_data structure, we don't need the helper. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Delete the old blorp shader emit codeJason Ekstrand2016-05-148-1664/+8
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Stop doing f2i(i2f(sample_id))Jason Ekstrand2016-05-141-13/+23
| | | | | | | | NIR gets kind of awkward when you have a 3-component vector with two floats and one int. This led to us accidentally going through float for the sample index. It doesn't hurt anything but it also isn't needed. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Refactor coordinate mungingJason Ekstrand2016-05-141-30/+29
| | | | | | | The original code-flow tried to map original blorp. This puts things more where they belong and simplifies some of the logic. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add bilinear blending support to the NIR pathJason Ekstrand2016-05-141-6/+114
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add support for averaging resolves to the NIR pathJason Ekstrand2016-05-141-18/+145
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add MSAA encode/decode support to the NIR pathJason Ekstrand2016-05-141-9/+194
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add support for W-[de]tiling to the NIR pathJason Ekstrand2016-05-141-2/+123
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add support for discard-based bounds checks to the NIR pathJason Ekstrand2016-05-141-1/+18
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add initial support for NIR-based blit shadersJason Ekstrand2016-05-141-24/+405
| | | | | | Many of the more complex cases still fall back to the old shader builder. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Refactor getting the blit kernel into a helperJason Ekstrand2016-05-141-13/+22
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Use NIR for clear shadersJason Ekstrand2016-05-141-145/+39
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95373 Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Create the program key in get_clear_kernelJason Ekstrand2016-05-141-17/+15
| | | | | | | There's no reason to be passing a whole struct around just for a single boolean. We can create it later when we actually need to use it as a key. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add a helper for compiling NIR shadersJason Ekstrand2016-05-142-0/+105
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* blorp: Add initial state setup support for SIMD8 dispatchJason Ekstrand2016-05-147-34/+67
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add a param array to prog_dataJason Ekstrand2016-05-143-5/+22
| | | | | | | This array allows the push constants to be re-arranged on upload. The actual arrangement will, eventually, come from the back-end compiler. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/blorp: Add a prog_data_init helperJason Ekstrand2016-05-144-2/+12
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Implement the new NIR MCS texturingJason Ekstrand2016-05-141-2/+12
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add texture opcodes and source types for multisample compressionJason Ekstrand2016-05-142-0/+12
| | | | | | | | | | | Intel hardware does a form of multisample compression that involves an auxilary surface called the MCS. When an MCS is in use, you have to first sample from the MCS with a special opcode and then pass the result of that operation into the next sample instrucion. Normally, we just do this ourselves in the back-end, but we want to expose that functionality to NIR so that we can use MCS values directly in NIR-based blorp. Reviewed-by: Kenneth Graunke <[email protected]>
* nir/builder: Add a helper for grabbing multiple channels from an ssa defJason Ekstrand2016-05-142-3/+15
| | | | | | | This is similar to nir_channel except that it lets you grab more than one channel by providing a mask. Reviewed-by: Kenneth Graunke <[email protected]>
* nir/builder: Generate the alu helpers directly in pythonJason Ekstrand2016-05-142-31/+13
| | | | | | | | | There's no reason for having a macro *and* a python generator. We can easily just do the whole thing in python. This has the advantage that we are no longer definining ALU# macros which conflict with the ones in brw_fs_builder.h. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Use MRF0 for the repclear messageJason Ekstrand2016-05-141-1/+1
| | | | | | | This is what BLORP does. Making them match cuts down on the noise when looking at AUB diffs. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Simplify the sample layout calculationJason Ekstrand2016-05-141-17/+7
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Organize prog_data by ksp number rather than SIMD widthJason Ekstrand2016-05-1411-192/+110
| | | | | | | | | | The hardware packets organize kernel pointers and GRF start by slots that don't map directly to dispatch width. This means that all of the state setup code has to re-arrange the data from prog_data into these slots. This logic has been duplicated 4 times in the GL driver and one more time in the Vulkan driver. Let's just put it all in brw_fs.cpp. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/gen7_wm: Move where we set the fast clear opJason Ekstrand2016-05-141-2/+2
| | | | | | | This better matches gen8 state setup Acked-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Stop setting dispatch_grf_start_reg from the visitorJason Ekstrand2016-05-145-14/+9
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Clean up the logic in compile_fs a bitJason Ekstrand2016-05-141-32/+41
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/state: Clean up WM/PS state to pull more things out of prog_dataJason Ekstrand2016-05-144-44/+15
| | | | | | | | | Now that we have a persample_shading bit in prog_data we can reduce the amount the state setup code needs to be looking at the GL state. In particular, it no longer pulls anything directly out of the gl_fragment_program and no longer depends on NEW_FRAGMENT_PROGRAM. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Rework the persample shading key/prog_data bitsJason Ekstrand2016-05-147-56/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | This commit reworks and simplifies the way we handle persample shading in the shader key and prog_data. The previous approach had three different key bits that had slightly different and hard-to-decern meanings while the new bits are far more clear. This commit changes it to two easily understood bits that communicate everything we need: 1) key->persample_interp: means that the user has requested persample interpolation through the API. This is equivalent to having SAMPLE_SHADING enabled and having MIN_SAMPLE_SHADING_VALUE set high enough that you actually get multiple per-sample invocations. 2) key->multisample_fbo: means that the shader will be running on an actual multi-sampled framebuffer. This commit also adds a new "persample_dispatch" bit to prog_data which indicates that the shader should be run in persample mode. This way the state setup code doesn't have to look at the fragment program or GL state and can just pull that data out of the prog_data. In theory, this shuffle could mean more recompiles. However, in practice, we were shoving enough state into the key before that we were probably hitting a recompile on every per-sample shader anyway. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Add an info bit for uses_sample_qualifierJason Ekstrand2016-05-143-1/+13
| | | | Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Fix undefined df bits in brw_reg comparisons.Kenneth Graunke2016-05-144-12/+22
| | | | | | | | | | | | | | | | | | Commit 5310bca024f77da40ea6f4c275455f9cb0528f9e added a new "double df" field to the brw_reg struct, adding an extra 4 bytes of data that isn't usually initialized (or may contain irrelevant garbage if the struct is mutated). This means that it's no longer safe to memcmp(). Instead, add a brw_regs_equal() function which ignores the extra df bits unless they matter. To keep the implementation cheap, we wrap the first set of fields in a union/struct so that we can use a single DWord comparison. v2: Drop unnecessary casts (caught by Francisco Jerez). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
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