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* nir: rework force_unroll_array_access()Timothy Arceri2018-12-131-14/+35
* nir: factor out some of the complex loop unroll code to a helperTimothy Arceri2018-12-131-51/+64
* meson: libfreedreno depends upon libdrm (for fence support)Rhys Kidd2018-12-121-3/+1
* nir: Document the function inlining processJason Ekstrand2018-12-121-0/+68
* intel/blorp: Assert that we don't re-layout a compressed surfaceJason Ekstrand2018-12-121-0/+3
* anv/pipeline: Set the correct binding count for compute shadersJason Ekstrand2018-12-121-2/+6
* radv: bump reported version to 1.1.90Samuel Pitoiset2018-12-121-1/+1
* virgl: force linear texturing supportErik Faye-Lund2018-12-121-2/+3
* intel/compiler: do not copy-propagate strided regions to ddx/ddy argumentsIago Toral Quiroga2018-12-121-0/+21
* anv: Advertise support for MinLod on Skylake+Jason Ekstrand2018-12-112-1/+2
* intel/fs: Support min_lod parameters on texture instructionsJason Ekstrand2018-12-114-2/+31
* nir/lower_tex: Add lowering for some min_lod casesJason Ekstrand2018-12-112-0/+116
* nir/lower_tex: Modify txd instructions instead of replacing themJason Ekstrand2018-12-111-41/+7
* nir/lower_tex: Simplify lower_gradient logicJason Ekstrand2018-12-111-12/+9
* spirv: Add support for MinLodJason Ekstrand2018-12-114-1/+16
* intel/ir: Don't allow allocating zero registersJason Ekstrand2018-12-111-0/+1
* gallivm: remove unused float coord wrapping for aos samplingRoland Scheidegger2018-12-121-507/+23
* freedreno: Add .dir-locals to the common directoryNeil Roberts2018-12-111-0/+8
* mesa/st/nir: fix missing nir_compact_varyingsRob Clark2018-12-111-1/+2
* nir: fix spelling typoRob Clark2018-12-111-1/+1
* anv,radv: Disable VK_EXT_pci_bus_infoJason Ekstrand2018-12-112-2/+2
* glapi: fixup EXT_multisampled_render_to_texture dispatchKristian H. Kristensen2018-12-105-5/+17
* freedreno: Fix the Makefile.am fixKristian H. Kristensen2018-12-101-3/+0
* i965/fs: Handle V/UV immediates in dump_instructions()Matt Turner2018-12-101-0/+5
* intel/compiler: Always print flag subregister numberSagar Ghuge2018-12-101-7/+6
* intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar regionSagar Ghuge2018-12-101-1/+18
* meson: Add nir_algebraic_parser_test to suitesDylan Baker2018-12-101-0/+1
* amd/addrlib: drop si_ci_vi_merged_enum.h from the listEmil Velikov2018-12-101-1/+0
* freedreno: add the missing _la in libfreedreno_ir3_laEmil Velikov2018-12-101-1/+1
* freedreno: drop duplicate MKDIR_GEN declarationEmil Velikov2018-12-101-1/+0
* loader: free error state, when checking the drawable typeKirill Burtsev2018-12-101-0/+1
* nir: make use of new nir_cf_list_clone_and_reinsert() helperTimothy Arceri2018-12-101-48/+28
* nir: add a new nir_cf_list_clone_and_reinsert() helperTimothy Arceri2018-12-101-0/+10
* nir: clarify some nit_loop_info member namesTimothy Arceri2018-12-103-17/+19
* nir: small tidy ups for nir_loop_analyze()Timothy Arceri2018-12-101-21/+10
* i965: Flip arguments to load_register_reg helpers.Kenneth Graunke2018-12-095-9/+10
* i965: Delete dead brw_meta_resolve_color prototype.Kenneth Graunke2018-12-091-7/+0
* nv50/ir: fix use-after-free in ConstantFolding::visitKarol Herbst2018-12-091-33/+49
* nouveau: use atomic operations for driver statisticsKarol Herbst2018-12-091-3/+4
* nv50/ir: initialize relDegree staticlyKarol Herbst2018-12-091-7/+16
* shader-packingEric Anholt2018-12-071-1/+2
* tfuEric Anholt2018-12-071-1/+1
* v3d: Fix a leak of the disassembled instruction string during debug dumps.Eric Anholt2018-12-071-0/+1
* vc4: Fix a leak of the transfer helper on screen destroy.Eric Anholt2018-12-071-0/+3
* v3d: Fix a leak of the transfer helper on screen destroy.Eric Anholt2018-12-071-0/+2
* v3d: Add VIR dumping of TMU config p0/p1.Eric Anholt2018-12-073-14/+33
* v3d: Simplify VIR uniform dumping using a temporary.Eric Anholt2018-12-071-19/+10
* v3d: Garbage collect unused uniforms code.Eric Anholt2018-12-072-90/+0
* v3d: Split most of TEXTURE_SHADER_STATE setup out of sampler views.Eric Anholt2018-12-071-58/+69
* v3d: Avoid confusing auto-indenting in TEXTURE_SHADER_STATE packingEric Anholt2018-12-071-4/+4