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* ddebug: add an option to dump info about a specific apitrace callMarek Olšák2016-07-053-3/+29
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ddebug: implement pipe_context::generate_mipmapMarek Olšák2016-07-051-1/+52
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ddebug: record and dump apitrace call numbersMarek Olšák2016-07-054-1/+31
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ddebug: implement emit_string_markerMarek Olšák2016-07-051-3/+10
| | | | | | | and remove some obsolete comments Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: remove unused code - radeon_llvm_util.*Marek Olšák2016-07-055-169/+0
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: keep using v_rcp_f32 for division in future LLVM (v2)Marek Olšák2016-07-052-2/+30
| | | | | | | | | | This will be needed after some LLVM changes that haven't landed yet. v2: - use LLVMIsConstant to fix an LLVM assertion failure. LLVMSetMetadata doesn't work with constants. - don't set float metadata as string Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove an obsolete commentMarek Olšák2016-07-051-5/+0
| | | | | | It's not true. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't interpolate colors if flatshading is enabledMarek Olšák2016-07-053-2/+14
| | | | | | use v_interp_mov for those Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enable the barycentric optimization in all casesMarek Olšák2016-07-053-18/+125
| | | | | | | | Handle the bc_optimize SGPR bit if both CENTER and CENTROID are enabled. This should increase the PS launch rate for big primitives with MSAA. Based on discussion with SPI guys. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: compute only one set of interpolation (i,j) when MSAA is disabledMarek Olšák2016-07-053-3/+88
| | | | | | | This should increase the PS launch rate for shaders using at least 2 pairs of perspective (i,j) and same for linear. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: split ps.prolog.force_persample_interp into persp and linear bitsMarek Olšák2016-07-053-45/+64
| | | | | | This reduces the number of v_mov's in the prolog. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't dump the shader key for non-monolithic shaders earlyMarek Olšák2016-07-051-1/+2
| | | | | | It's always zero. Reviewed-by: Nicolai Hähnle <[email protected]>
* r600g: Add double precision FMA opsJan Vesely2016-07-051-0/+2
| | | | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96782 Fixes: 54c4d525da7c7fc1e103d7a3e6db015abb132d5d ("r600g: Enable FMA on chips that support it") Signed-off-by: Jan Vesely <[email protected]> Tested-by: James Harvey <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600: fix duplicate 'const' declarationFrancesco Ansanelli2016-07-041-1/+1
| | | | Signed-off-by: Nicolai Hähnle <[email protected]>
* i965/urb: Allow blorp to record current settingsTopi Pohjolainen2016-07-043-74/+53
| | | | | | | | | | | | | This makes it possible to skip urb re-configuration if the subsequent renders agree with the settings. Also allows blorp to allocate the maximun amount of vs entries available. Core upload logic already knows how to calculate this. Helps one synthetic benchmark. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp/gen7+: Do not trigger push constant space reconfigTopi Pohjolainen2016-07-041-2/+1
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp/gen7+: Stop trashing push constant allocationTopi Pohjolainen2016-07-042-92/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Packet 3DSTATE_CONSTANT_PS is still emitted explicitly as ps stage itself is enabled and hardware may try to prefetch constants from the buffer. From the BSpec: 3D Pipeline - Windower - 3DSTATE_PUSH_CONSTANT_ALLOC_PS "Specifies the size of the PS constant buffer. This value will determine the amount of data the command stream can pre-fetch before the buffer is full." This is not possible on gen6. From the BSpec about 3DSTATE_CONSTANT_PS: "This packet must be followed by WM_STATE." Binding table emissions for stages other than PS can be now dropped, they were only needed for the 3DSTATE_CONSTANT_XS to be effective: From the BSpec: "The 3DSTATE_CONSTANT_* command is not committed to the shader unit until the corresponding (same shader) 3DSTATE_BINDING_TABLE_POINTER_* command is parsed." Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Remove support for push constantsTopi Pohjolainen2016-07-045-145/+12
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Use flat inputs instead of uniformsTopi Pohjolainen2016-07-042-15/+18
| | | | | | | v2 (Jason): Use LOAD_INPUT() macro Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Fix the size requirement for vertex elementsTopi Pohjolainen2016-07-043-16/+29
| | | | | | | | v2: Rebased as this is needed before flat inputs are enabled Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/blorp: Load tranformation coordinates as vec4Topi Pohjolainen2016-07-042-16/+11
| | | | | | | | | In preparation for loading as flat vertex input. v2: Use LOAD_INPUT() macro Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Rename LOAD_UNIFORM to LOAD_INPUTTopi Pohjolainen2016-07-041-9/+9
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Organize pixel kill and blend/scaled inputs into vec4sTopi Pohjolainen2016-07-043-36/+65
| | | | | | | | | | | | In addition, as these are never used in parallel, add a few assertions. v2 (Jason): Skip some complexity by putting them into a union but pad rectangle grid into a vec4 instead. Also keep the LOAD_UNIFORM macro. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/wsi: create swapchain images using specified image usageLionel Landwerlin2016-07-042-4/+9
| | | | | | | | | | | | | | | The image usage specified by the caller of vkCreateSwapchainKHR should be passed onto the internal image creation. Otherwise the driver might later crash when the user tries to use the image as a combined sampler even though the creation was explicitly created with VK_IMAGE_USAGE_TRANSFER_SRC_BIT. Leaving the previous VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT as this might be expected even if the swapchain is created without any flag. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96791 Cc: "12.0" <[email protected]>
* radeon/uvd: fix overflow error while calculating bit stream buffer sizeIndrajit Das2016-07-041-1/+1
| | | | Reviewed-by: Christian König <[email protected]>
* i965/blorp: Prepare for more than two vertex attributesTopi Pohjolainen2016-07-044-3/+22
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Tell vertex fetcher about flat inputsTopi Pohjolainen2016-07-042-8/+30
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Add support for flat input bufferTopi Pohjolainen2016-07-041-3/+65
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Store input read maskTopi Pohjolainen2016-07-042-0/+2
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Rename push constants to inputsTopi Pohjolainen2016-07-045-22/+22
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Use core vertex buffer state setupTopi Pohjolainen2016-07-041-48/+14
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Split vertex data and element setupTopi Pohjolainen2016-07-041-21/+25
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Unify vertex buffer setupTopi Pohjolainen2016-07-042-29/+46
| | | | | | | | On gen >= 8 one doesn't provide ending address but number of bytes available. This is relative to the given offset. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/draw: Expose vertex buffer state setupTopi Pohjolainen2016-07-042-18/+37
| | | | | | | Also change the interface to use start and end offsets. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* freedreno: fix crash on smaller gpus and higher resolutionsRob Clark2016-07-031-1/+1
| | | | | | | | | Devices with smaller GMEM size need more tiles. On db410c at 2048x1152, glmark2 shadow needed ~330 tiles for fullscreen. Lets bump it up to 512. (Maybe with MRT you could end up needing more, but at that point things are probably going to be painfully slow.) Signed-off-by: Rob Clark <[email protected]>
* i965: don't drop const initializers in vector splittingRob Clark2016-07-021-0/+12
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: add driconf to zero-init unintialized varsRob Clark2016-07-0211-1/+34
| | | | | | | | | | | | | Some games are sloppy.. perhaps because it is defined behavior for DX or perhaps because nv blob driver defaults things to zero. So add driconf param to force uninitialized variables to default to zero. This issue was observed with rust, from steam store. But has surfaced elsewhere in the past. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* freedreno/ir3: support glsl linking for cmdline compilerRob Clark2016-07-021-24/+47
| | | | | | | | | | | For .vert/.frag, now multiple can be specified on the cmdline for purposes of linking, and the last one specified is the one that is fed into the ir3 backend (and dumped along the way if --verbose is specified) Without this, varyings in frag shaders would appear as undefined. Signed-off-by: Rob Clark <[email protected]>
* glsl/standalone: initialize MaxUserAssignableUniformLocationsRob Clark2016-07-021-0/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update valid_buffer_range for SO buffersRob Clark2016-07-021-0/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: support non-user_buffer constsRob Clark2016-07-022-3/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a2xx: move setup/restore cmds into binning passRob Clark2016-07-024-9/+4
| | | | | | | | Rather than doing a separate submit at context create, move these cmds to before first tile, as is done on a3xx/a4xx. Otherwise state can be overwritten by other contexts. Signed-off-by: Rob Clark <[email protected]>
* freedreno: pass index buffer as a pipe_resourceRob Clark2016-07-022-16/+16
| | | | | | This will be useful in a following patch. Signed-off-by: Rob Clark <[email protected]>
* freedreno: switch emit_const_bo() to take prsc'sRob Clark2016-07-024-17/+18
| | | | | | We can push the unwrap of pipe_resource down. Signed-off-by: Rob Clark <[email protected]>
* nv30: Fix "array subscript is below array bounds" compiler warningHans de Goede2016-07-021-2/+1
| | | | | | | | gcc6 does not like the trick where we point to one entry before the array start and then start a while with a pre-increment. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nouveau: Fix a couple of "foo may be used uninitialized' compiler warningsHans de Goede2016-07-022-3/+3
| | | | | | | | | | | | | These are all new false positives with gcc6. In nouveau_compiler.c: gcc6 no longer assumes that passing a pointer to a variable into a function initialises that variable. In nv50_ir_from_tgsi.cpp op and mode are not set if there are 0 enabled dst channels, this never happens, but gcc cannot know this. Signed-off-by: Hans de Goede <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nouveau: Fix gcc6 / c++11 auto_ptr deprecation compiler warningsHans de Goede2016-07-021-0/+4
| | | | | Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nouveau: Add support for SV_WORK_DIMHans de Goede2016-07-028-12/+29
| | | | | | | | Add support for SV_WORK_DIM for nvc0 and nve4. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0: Make NVC0_CB_AUX_GRID_INFO take an index argumentHans de Goede2016-07-023-4/+4
| | | | | | | | | This brings it inline with the other macros like NVC0_CB_AUX_UBO_INFO and NVC0_CB_AUX_TEX_INFO. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* clover: Pass work_dim parameter of clEnqueueNDRangeKernel() to driverHans de Goede2016-07-022-0/+8
| | | | | | | | | In order to implement get_work_dim() the driver may need to know the clEnqueueNDRangeKernel() work_dim parameter, so pass it to the driver. Signed-off-by: Hans de Goede <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
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