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* freedreno: update generated headersRob Clark2019-04-2511-102/+140
| | | | | | Pull in updates for sample shading. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: cleanup instruction builder macrosRob Clark2019-04-251-46/+27
| | | | | | | | De-duplicate the "normal" and "flags" versions of the macros, and while at it go ahead and add "flags" versions for all the remaining macros, since we'll at least need INSTR1F in a following commit. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: more emit-cat5 fixesRob Clark2019-04-251-0/+2
| | | | | | Couple more opcodes which don't take a sampler id as first arg. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix rgetpos decodingRob Clark2019-04-251-1/+1
| | | | | | It takes an argument. Signed-off-by: Rob Clark <[email protected]>
* compiler: rename SYSTEM_VALUE_VARYING_COORDRob Clark2019-04-2510-11/+23
| | | | | | | And add corresponding enums for different sorts of varying interpolation. Signed-off-by: Rob Clark <[email protected]>
* freedreno: add robustness supportRob Clark2019-04-254-0/+57
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/drm: update for robustnessRob Clark2019-04-253-0/+44
| | | | | | | | | Update UABI header and add FD_PP_PGTABLE and FD_NR_FAULTS params. Robustness can be supported by a kernel which provides the new ABI if it also indicates that per-process pagetables are in use. Signed-off-by: Rob Clark <[email protected]>
* panfrost/midgard: Add new bitwise opsAlyssa Rosenzweig2019-04-252-6/+24
| | | | | | These fused NOT-ops could maybe help somehow...? Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Identify inandAlyssa Rosenzweig2019-04-253-3/+7
| | | | | | | This was previously thought to be inot, but it's actually a bit more general than that! :) Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Copy prop for texture registersAlyssa Rosenzweig2019-04-251-2/+35
| | | | | | | | We'll want to unify this with main copy prop (and extend to varyings), but that'll take more care to handle some special cases, so leave it as a stub pass for now. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Optimize csel involving 0Alyssa Rosenzweig2019-04-252-15/+30
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Extend copy propagation passAlyssa Rosenzweig2019-04-251-8/+48
| | | | | | | | This extends copy propagation to respect output modifiers for ALU instructions, as well as potentially fixing some bugs related to looping (all dEQP loop tests pass). Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost/midgard: Reduce fmax(a, 0.0) to fmov.posAlyssa Rosenzweig2019-04-251-3/+33
| | | | | | | This will allow us to copyprop away the move and eliminate the instruction entirely. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* radv: Expose Vulkan 1.1 for Android.Bas Nieuwenhuizen2019-04-251-1/+1
| | | | | | We have the YCBCR feature now. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Expose VK_EXT_ycbcr_image_arrays.Bas Nieuwenhuizen2019-04-252-0/+7
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Enable YCBCR conversion feature.Bas Nieuwenhuizen2019-04-252-1/+2
| | | | | | | | | This enabled the basic YCBCR features. We support basic multiplane formats using 8-bit and 16-bit unorms, as well as YUV2 formats. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add ycbcr subsampled & multiplane formats to csv.Bas Nieuwenhuizen2019-04-251-0/+12
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add ycbcr format features.Bas Nieuwenhuizen2019-04-251-0/+27
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add hashing for the ycbcr samplers.Bas Nieuwenhuizen2019-04-252-7/+7
| | | | | | Otherwise caching gets very confused. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Run the new ycbcr lowering pass.Bas Nieuwenhuizen2019-04-253-3/+6
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add ycbcr lowering pass.Bas Nieuwenhuizen2019-04-254-0/+376
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Update descriptor sets for multiple planes.Bas Nieuwenhuizen2019-04-253-18/+35
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add ycbcr samplers in descriptor set layouts.Bas Nieuwenhuizen2019-04-252-2/+77
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: Add support for planes.Bas Nieuwenhuizen2019-04-253-4/+26
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Allow mixed src/dst aspects in copies.Bas Nieuwenhuizen2019-04-251-104/+116
| | | | | | e.g. COLOR + PLANE_2, as well COLOR + COLOR for multiplane images. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add support for image views with multiple planes.Bas Nieuwenhuizen2019-04-253-21/+41
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add ycbcr conversion structs.Bas Nieuwenhuizen2019-04-253-4/+42
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Support different source & dest aspects for planar images in blit2d.Bas Nieuwenhuizen2019-04-251-2/+9
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add single plane image views & meta operations.Bas Nieuwenhuizen2019-04-254-10/+45
| | | | | | | Copies & clear of multiplane images is not allowed so we do not have to handle that case. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add multiple planes to images.Bas Nieuwenhuizen2019-04-257-135/+204
| | | | | | | | | | No functional changes. This temporarily uses plane 0 for everything. Long term plan is that only single plane images get to use metadata like htile/dcc/cmask/fmask. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add logic for multisample format descriptions.Bas Nieuwenhuizen2019-04-254-10/+86
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add logic for subsampled format descriptions.Bas Nieuwenhuizen2019-04-253-0/+28
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* intel/fs: Don't handle texop_tex for shaders without implicit LODCaio Marcelo de Oliveira Filho2019-04-252-6/+2
| | | | | | | | | These will be lowered by nir_lower_tex() with the lower_tex_when_implicit_lod_not_supported, so don't need the extra handling here. Reviewed-by: Rob Clark <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* nir: Add option to lower tex to txl when shader don't support implicit LODCaio Marcelo de Oliveira Filho2019-04-252-0/+8
| | | | | | | | | | | We already add the LOD src, so go ahead and update the texop as well when this option is set. v2: Make it an option. (Rob Clark) v3: Use a more concise name suggested by Jason. Reviewed-by: Rob Clark <[email protected]>
* intel/compiler/fs/icl: Use dummy masked urb write for tess evalTopi Pohjolainen2019-04-251-1/+50
| | | | | | | | | | | One cannot write the URB arbitrarily and therefore the message has to be carefully constructed. The clever tricks originate from Kenneth and Jason, I'm just writing the patch. Fixes GPU hangs on ICL with Vulkan CTS. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Topi Pohjolainen <[email protected]>
* iris: make the TFB result visible to othersAndrii Simiklit2019-04-251-10/+15
| | | | | | | | | | | | | | | | | | | | | | OpenGL 4.6 Spec: "5.3.3 Rules ....... Note: “Updates” via rendering or transform feedback are treated consistently with updates via GL commands. Once EndTransformFeedback has been issued, any subsequent command in the same context that uses the results of the transform feedback operation will see the results." v2: removed a wrong comment ( Kenneth Graunke <[email protected]> ) v3: - flush+dirty depends on buffers usage history - removed an old hack ( Kenneth Graunke <[email protected]> ) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110404 Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Some tidying for preemption supportKenneth Graunke2019-04-254-98/+102
| | | | | | | | Just enable it during init_render_context on Gen10+, and move the Gen9 state tracking into iris_genx_state so it only exists on Gen9. Reviewed-by: Mike Blumenkrantz <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]>
* radeonsi: remove dirty slot masks from scissor and viewport statesMarek Olšák2019-04-256-93/+40
| | | | | | All registers in the array need to be updated if any of them is changed. Only apps writing gl_ViewportIndex were affected by this bug.
* radeonsi/gfx9: rework the gfx9 scissor bug workaround (v2)Marek Olšák2019-04-258-48/+68
| | | | | | | | | | | Needed to track context rolls caused by streamout and ACQUIRE_MEM. ACQUIRE_MEM can occur outside of draw calls. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110355 v2: squashed patches and done more rework Cc: 19.0 <[email protected]>
* radeonsi/gfx9: set that window_rectangles always roll the contextMarek Olšák2019-04-251-1/+2
| | | | Cc: 19.0 <[email protected]>
* meson: Force '.so' extension for DRI driversJon Turney2019-04-255-0/+5
| | | | | | | | | | | | DRI driver loadable modules are always installed with install_megadriver.py with names ending with '.so', irrespective of platform. Force the name the loadable module is built with to match, so install_megadriver.py doesn't spin trying to remove non-existent symlinks. Fixes: c77acc3c "meson: remove meson-created megadrivers symlinks"
* radeonsi: add radeonsi_sync_compile optionNicolai Hähnle2019-04-252-3/+11
| | | | | | | | | Force the driver thread to sync immediately with a compiler thread (but compilation still happens in a separate thread). This can be useful to simplify debugging compiler issues. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add radeonsi_aux_debug option for aux context debug dumpsNicolai Hähnle2019-04-253-1/+33
| | | | | | | | Enabling this option will create ddebug-style dumps for the aux context, except that instead of intercepting the pipe_context layer we just dump the IB contents on flush. Reviewed-by: Marek Olšák <[email protected]>
* ddebug: expose some helper functions as non-inlineNicolai Hähnle2019-04-252-59/+70
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: dump driver state into a separate fileNicolai Hähnle2019-04-251-5/+12
| | | | | | | | | | Due to asynchronous execution, it's not clear which of the draws the state may refer to. This also works around an issue encountered with radeonsi where dumping the driver state itself caused a hang. Reviewed-by: Marek Olšák <[email protected]>
* ddebug: log calls to pipe->flushNicolai Hähnle2019-04-252-20/+61
| | | | | | This can be useful when internal draws lead to a hang. Reviewed-by: Marek Olšák <[email protected]>
* ddebug: set thread nameNicolai Hähnle2019-04-251-0/+10
| | | | | | For better debuggability. Reviewed-by: Marek Olšák <[email protected]>
* util/u_log: flush auto loggers before starting a new pageNicolai Hähnle2019-04-251-0/+4
| | | | | | | Without this, command stream dumps of radeonsi may misleadingly end up in a later page. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_debug_options for convenient adding/removing of optionsNicolai Hähnle2019-04-258-31/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the definition of radeonsi_clear_db_cache_before_clear there, as well as radeonsi_enable_nir. This removes the AMD_DEBUG=nir option. We currently still have two places for options: the driconf machinery and AMD_DEBUG/R600_DEBUG. If we are to have a single place for options, then the driconf machinery should be preferred since it's more flexible. The only downside of the driconf machinery was that adding new options was quite inconvenient. With this change, a simple boolean option can be added with a single line of code, same as for AMD_DEBUG. One technical limitation of this particular implementation is that while almost all driconf features are available, the translation machinery doesn't pick up the description strings for options added in si_debvug_options. In practice, translations haven't been provided anyway, and this is intended for developer options, so I'm not too worried. It could always be added later if anybody really cares. v2: - use bool instead of uint8_t for options - si_debug_options.inc -> si_debug_options.h Reviewed-by: Marek Olšák <[email protected]>
* Revert "intel/compiler: split is_partial_write() into two variants"Juan A. Suarez Romero2019-04-2511-54/+30
| | | | | | | | | | This reverts commit 40b3abb4d16af4cef0307e1b4904c2ec0924299e. It is not clear that this commit was entirely correct, and unfortunately it was pushed by error. CC: Jason Ekstrand <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
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