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* i965: Update 3DSTATE_CLIP for Broadwell.Kenneth Graunke2014-01-312-3/+8
| | | | | | | | | | | Broadwell's winding order, polygon fill, and viewport Z test fields have moved to DWord 1 of 3DSTATE_RASTER. v2: Add a perf_debug for a future optimization and improve commit message (both suggested by Eric Anholt). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Rework vertex uploads for Broadwell.Kenneth Graunke2014-01-317-3/+274
| | | | | | | | | | | | | | v2: Emit a dummy 3DSTATE_VF_SGVS packet when not needed. v3: Add WARN_ONCE and perf_debugs requested by Eric Anholt. v4: Program 3DSTATE_SGVS even in the no-elements case so gl_VertexID continues working. Fix 3DSTATE_VF_INSTANCING to not use an element index to access the buffers array. Some ARB_draw_indirect prep work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Update STATE_BASE_ADDRESS for Broadwell.Kenneth Graunke2014-01-314-1/+76
| | | | | | | | | | | | | | | v2: Fix missing "change" bit on instruction state base address (caught by Haihao Xiang). v3: Add a perf_debug for missing MOCS setup, requested by Eric. v4: Fix buffer sizes. The value, specified at bit 12 and up, is actually measured in 4k pages. We need to round up to the next multiple of 4k. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v3] Reviewed-by: Matt Turner <[email protected]> [v4]
* i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.Kenneth Graunke2014-01-315-2/+237
| | | | | | | | | | | | | | | | v2: Fix setting of GEN8_PSX_ATTRIBUTE_ENABLE after rebases. v3: Add missing binding table entry counts. Don't worry about alpha testing or alpha to coverage when setting the "Kill Pixel" bit; those are specified in 3DSTATE_PS_BLEND (caught by Eric Anholt). Drop unused _NEW_BUFFERS. Tidy comments. v4: Rebase on Paul Berry's changes to CurrentFragmentProgram. v5: Re-enable line stippling. It doesn't crash or anything. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v3]
* i965: Rework 3DSTATE_VS for Broadwell.Kenneth Graunke2014-01-315-3/+144
| | | | | | | | | | | | | | | | | | v2: Remove incorrect MOCS shifts; rename urb_entry_write_offset to urb_entry_output_offset to closer match the documentation. v3: Only emit a non-zero constant buffer read length when active. v4: Add missing binding table counts (caught by Eric). v5: Rebase on Paul Berry's changes to CurrentVertexProgram. v6: Drop bogus SBE read length/offset field code. We were programming the wrong values, and our 3DSTATE_SBE code overrides any value we put here anyway with the correct one. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v4]
* i965: Add the new 3DSTATE_PS_BLEND state packet.Kenneth Graunke2014-01-315-0/+142
| | | | | | | | | | | v2: Only set GEN8_PS_BLEND_HAS_WRITEABLE_RT if color buffer writes are enabled (caught by Eric Anholt). v3: Set non-blending flags (writeable RT, alpha test, alpha to coverage) for integer formats too. +14 Piglits. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v2]
* i965: Replace DEPTH_STENCIL_STATE with Gen8's 3DSTATE_WM_DEPTH_STENCIL.Kenneth Graunke2014-01-315-1/+131
| | | | | | | | | | | | | | | v2: Use stencil->_WriteEnabled instead of setting GEN8_WM_DS_STENCIL_BUFFER_WRITE_ENABLE twice (suggested by Eric). v3: Mask stencil->WriteMask and stencil->ValueMask with 0xff. The field is only 8-bits, so we'd trip the new SET_FIELD assertion when core Mesa gave us a value like 0xFFFFFFFF. The Gen7 code uses structure field widths to implicitly do this truncation. Fixes Piglit tests. v4: Use uint32_t for dw1/dw2, not uint8_t. Worst. Typo. Ever. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> [v2]
* i965: Update SF, SBE, and RASTER state for Broadwell.Kenneth Graunke2014-01-315-2/+311
| | | | | | | | | | | | | | | | The attribute override portion of 3DSTATE_SBE was split out into 3DSTATE_SBE_SWIZ; various bits of 3DSTATE_SF were split out into 3DSTATE_RASTER. v2: Set Force URB Read Offset bit. Eventually the URB read offset should be set in 3DSTATE_VS, but that will require some refactoring. v3: Rebase on viewport array changes. v4: Improve comments about URB read length/offset overrides. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* i965: Bump generation assertions on workaround flushes.Kenneth Graunke2014-01-311-2/+2
| | | | | | | | I haven't investigated whether these are necessary on Broadwell or not, but for paranoia's sake, we may as well continue doing them for now. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Duplicate gen7_atoms to gen8_atoms.Kenneth Graunke2014-01-311-1/+79
| | | | | | | | It's going to diverge significantly. Starting out with a copy allows future patches to change atoms one by one. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* radeon: move driContextSetFlags(ctx) call after ctx var is initializedBrian Paul2014-01-311-2/+3
| | | | | CC: "10.0" <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r200: move driContextSetFlags(ctx) call after ctx var is initializedBrian Paul2014-01-311-2/+3
| | | | | | | Otherwise, ctx was a garbage value. CC: "10.0" <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* llvmpipe: fix denorm handling for r11g11b10_float format when blendingRoland Scheidegger2014-01-311-2/+15
| | | | | | | | The code re-enabling denorms for small float formats did not recognize this format due to format handling hacks (mainly, the lp_type doesn't have the floating bit set). Reviewed-by: Jose Fonseca <[email protected]>
* glsl: Expand non-expr & non-swizzle scalar rvalues in vectorizing.Matt Turner2014-01-311-6/+8
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* glcpp: Reject #version after the version has been resolved.Matt Turner2014-01-311-0/+6
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74166 Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Carl Worth <[email protected]>
* glcpp: Rename the variable used to enable debugging.Carl Worth2014-01-311-1/+1
| | | | | | | | The -p option we now use when calling bison means that this variable will be named glcpp_parser_debug not yydebug. This was not caught when the -p option was added because this variable isn't used in the code as committed. (I prefer the declaration to remain since it allows a developer to easily find this variable name to enable debugging.)
* glcpp: Add "make check" test for comment-parsing bugCarl Worth2014-01-312-0/+5
| | | | | | | This is the innocent-looking but killer test case to verify the bug fixed in the preceding commit. Reviewed-by: Jordan Justen <[email protected]>
* glcpp: Don't enter lexer's NEWLINE_CATCHUP start state for single-line commentsCarl Worth2014-01-311-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit 6005e9cb28 a new start state of NEWLINE_CATCHUP was added to the lexer. This start state is used whenever the lexer is emitting a NEWLINE token to emit additional NEWLINE tokens for any newline characters that were skipped by an immediately preceding multi-line comment. However, that commit erroneously entered the NEWLINE_CATCHUP state for single-line comments. This is not desired since in the case of a single-line comment, the lexer is not emitting any NEWLINE token. The result is that the lexer will remain in the NEWLINE_CATCHUP state and proceed to fail to emit a NEWLINE token for the subsequent newline character, (since the case to match \n expects only the INITIAL start state). The fix is quite simple, remove the "BEGIN NEWLINE_CATCHUP" code from the single-line comment case, (preserving it only in exactly the cases where the lexer is actually emitting a NEWLINE token). Many thanks to Petri Latvala for reporting this bug and for providing the minimal test case to exercise it. The bug showed up only with a multi-line comment which was followed immediately by a single-line comment (without any intervening newline), such as: /* */ // Kablam! Since 6005e9cb28, and before this commit, that very innocent-looking combination of comments would yield a parse failure in the compiler. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72686 Reviewed-by: Jordan Justen <[email protected]>
* mesa: use _mesa_align_free() in _mesa_delete_buffer_object()Brian Paul2014-01-311-1/+1
| | | | | | | To match _mesa_align_malloc() call in _mesa_buffer_data(). Found by Colin Harrison <[email protected]> Signed-off-by: Brian Paul <[email protected]>
* st/dri: Fix tests for no draw/read buffers in dri_make_current()Michel Dänzer2014-01-311-2/+2
| | | | | | Fixes piglit glx/GLX_ARB_create_context/current with no framebuffer. Reviewed-by: Marek Olšák <[email protected]>
* dri3: Track current Present swap mode and adjust buffer countsKeith Packard2014-01-302-24/+35
| | | | | | | | | | | | | | | | | | | | | | | | This automatically adjusts the number of buffers that we want based on what swapping mode the X server is using and the current swap interval: swap mode interval buffers copy > 0 1 copy 0 2 flip > 0 2 flip 0 3 Note that flip with swap interval 0 is currently limited to twice the underlying refresh rate because of how the kernel manages flipping. Moving from 3 to 4 buffers would help, but that seems ridiculous. v2: Just update num_back at the point that the values that change num_back change. This means we'll have the updated value at the point that the freeing of old going-to-be-unused backbuffers happens, which might not have been the case before (change by anholt, acked by keithp). Signed-off-by: Keith Packard <[email protected]> Signed-off-by: Eric Anholt <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* dri3, i915, i965: Add __DRI_IMAGE_FOURCC_SARGB8888Keith Packard2014-01-303-0/+7
| | | | | | | | | | | | | | | | The __DRIimage createImageFromFds function takes a fourcc code, but there was no fourcc code that match __DRI_IMAGE_FORMAT_SARGB8. This adds a define for that format, adds a translation in DRI3 from __DRI_IMAGE_FORMAT_SARGB8 to __DRI_IMAGE_FOURCC_SARGB8888 and then adds translations *back* to __IMAGE_FORMAT_SARGB8 in both the i915 and i965 drivers. I'll refrain from comments on whether I think having two separate sets of format defines in dri_interface.h is a good idea or not... Fixes piglit glx-tfp and glx-visuals-depth Signed-off-by: Keith Packard <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* dri3: Flush XCB before blocking for special eventsKeith Packard2014-01-301-0/+2
| | | | | | | | XCB doesn't flush the output buffer automatically, so we have to call xcb_flush ourselves before waiting. Signed-off-by: Keith Packard <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* dri3: Enable GLX_INTEL_swap_eventKeith Packard2014-01-301-17/+1
| | | | | | | | | Now that we're tracking SBC values correctly, and the X server has the ability to send the GLX swap events from a PresentPixmap request, enable this extension. Signed-off-by: Keith Packard <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* dri3: Fix dri3_wait_for_sbc to wait for completion of requested SBCKeith Packard2014-01-301-16/+39
| | | | | | | | | | | | | | | | | Eric figured out that glXWaitForSbcOML wanted to block until the requested SBC had been completed, which means to wait until the PresentCompleteNotify event for that SBC had been received. This replaces the simple sleep(1) loop (which was bogus) with a loop that just checks to see if we've seen the specified SBC value come back in a PresentCompleteNotify event yet. The change is a bit larger than that as I've broken out a piece of common code to wait for and process a single Present event for the target drawable. Signed-off-by: Keith Packard <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* dri3: Track full 64-bit SBC numbers, instead of just 32-bitsKeith Packard2014-01-302-20/+30
| | | | | | | | | | Tracking the full 64-bit SBC values makes it clearer how those values are being used, and simplifies the wait_msc code. The only trick is in re-constructing the full 64-bit value from Present's 32-bit serial number that we use to pass the SBC value from request to event. Signed-off-by: Keith Packard <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* mesa: Add warning to _REV pack/unpack functions with incorrect behaviorMark Mueller2014-01-312-1/+18
| | | | | Signed-off-by: Mark Mueller <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g: Removed unnecessary positivity check for unsigned int variable.Siavash Eliasi2014-01-311-1/+1
| | | | Signed-off-by: Marek Olšák <[email protected]>
* st/dri: Allow creating OpenGL 3.3 core contextsMichel Dänzer2014-01-301-1/+1
| | | | | | Enables OpenGL 3.3 piglit tests. Reviewed-by: Marek Olšák <[email protected]>
* build: Share the all-local rule for linking libraries into the build dirKristian Høgsberg2014-01-297-42/+7
| | | | | | | | | | This consolidates how we link the libraries into the build directory. It works for lib_LTLIBRARIES but not custom shared libraries like DRI drivers or gallium state trackers which needs special casing (cf dri mega drivers, for example) Signed-off-by: Kristian Høgsberg <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* loader: do not print the pci id during normal operationEmil Velikov2014-01-291-1/+1
| | | | | | | | | | | | Spamming the pci id is not beneficial. Make sure it's printed only when needed. v2: Change severity to _LOADER_DEBUG, rather than removing the message. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* loader: print WARNING and FATAL messages using the default loggerEmil Velikov2014-01-291-1/+1
| | | | | | | | Lower values are used for more severe cases. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* glsl: s/_NDEBUG/NDEBUG/Emil Velikov2014-01-291-1/+1
| | | | | | | | | The former symbol is never defined within mesa. Based on the code it seems that the original intent was to use NDEBUG. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* mesa: Return after ScissorArrayv or ScissorIndexed detect a parameter errorCourtney Goeltzenleuchter2014-01-291-0/+2
| | | | | | | | Fixes piglit arb_viewport_array-scissor-ignore. Signed-off-by: Courtney Goeltzenleuchter <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Jon Ashburn <[email protected]>
* mesa: GL_ARB_map_buffer_alignment is not optionalSiavash Eliasi2014-01-295-6/+2
| | | | | | | | | | | | | | | Every driver supports it. All current and future Gallium drivers always support it, and all existing classic drivers support it. v2: Making GL_ARB_map_buffer_alignment a desktop OpenGL extension only. v3: Squash two commits together. v4 (idr): MIN_MAP_BUFFER_ALIGNMENT queries don't have any dependencies. In previous versions of the patch it depended on EXTRA_API_GL which would prevent the query from working in core profile contexts. Signed-off-by: Ian Romanick <[email protected]>
* nouveau: Use gl_constants::MinMapBufferAlignment as the alignment in ↵Siavash Eliasi2014-01-291-1/+2
| | | | | | | | | nouveau_bo_new This driver does not support GL_ARB_map_buffer_range, so no special treatment is needed for unaligned offsets in the mapping. Reviewed-by: Ian Romanick <[email protected]>
* radeon / r200: Use gl_constants::MinMapBufferAlignment as the alignment in ↵Siavash Eliasi2014-01-291-1/+1
| | | | | | | | | radeon_bo_open These drivers do not support GL_ARB_map_buffer_range, so no special treatment is needed for unaligned offsets in the mapping. Reviewed-by: Ian Romanick <[email protected]>
* mesa: Use _mesa_align_malloc in _mesa_buffer_dataSiavash Eliasi2014-01-291-2/+5
| | | | | | v2: Fixed memory leak. Reviewed-by: Ian Romanick <[email protected]>
* mesa: Set gl_constants::MinMapBufferAlignment to 64 by defaultSiavash Eliasi2014-01-291-1/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* mesa/st: Unconditionally enable ARB_map_buffer_alignment.Siavash Eliasi2014-01-291-3/+3
| | | | Reviewed-by: Ian Romanick <[email protected]>
* freedreno: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Ian Romanick2014-01-291-0/+3
| | | | | | | | Allocations actually have page alignment, but 64 is still a reasonable value. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* ilo: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+1
| | | | | | | | | | Ian manually ran the map_buffer_range* tests and the arb_map_buffer_alignment-* tests, but he did not do a full piglit run. v2 (idr): Use 64 instead of 4096 Tested-by: Ian Romanick <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* svga: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* i915g: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+3
| | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly.
* i915g: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-1/+1
| | | | Reviewed-by: Ian Romanick <[email protected]>
* llvmpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* llvmpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-3/+3
| | | | | | v2: Changed allocation alignment of llvmpipe_displaytarget_layout. Reviewed-by: Ian Romanick <[email protected]>
* softpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
| | | | | | | v2: Fixed setting switch cases prior to PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT incorrectly. Reviewed-by: Ian Romanick <[email protected]>
* softpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-2/+2
| | | | | | v2: Changed allocation alignment in softpipe_displaytarget_layout. Reviewed-by: Ian Romanick <[email protected]>
* i915g: support more PIPE_CAPsStéphane Marchesin2014-01-281-3/+6
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