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Author
Age
Files
Lines
*
i965/gen9: Don't use fast copy blit in case of non power of 2 cpp
Anuj Phogat
2016-01-05
1
-2
/
+4
*
i915/i965: Fix typo in perf_debug message
Ian Romanick
2016-01-05
2
-2
/
+2
*
st/mesa: minor indentation fixes
Brian Paul
2016-01-05
1
-4
/
+4
*
draw: minor indentation fix
Brian Paul
2016-01-05
1
-1
/
+1
*
mesa: minor clean-up of some memcpy/sizeof() calls in m_matrix.c
Brian Paul
2016-01-05
1
-7
/
+7
*
util: add debug_dump_ubyte_rgba_bmp()
Brian Paul
2016-01-05
2
-0
/
+63
*
mesa: check for z=0 in _mesa_Vertex3dv()
Brian Paul
2016-01-05
1
-1
/
+4
*
svga: fix test for SVGA_NEW_STIPPLE
Brian Paul
2016-01-05
2
-4
/
+8
*
svga: add some comments in svga_state_vs.c
Brian Paul
2016-01-05
1
-0
/
+3
*
svga: change svga_hw_view_state::dirty to boolean
Brian Paul
2016-01-05
1
-1
/
+1
*
svga: avoid emitting redundant SetVertexBuffers() commands
Brian Paul
2016-01-05
2
-5
/
+26
*
svga: check for no-ops in svga_bind_sampler_states()
Brian Paul
2016-01-05
1
-1
/
+15
*
i965: quieten compiler warning about out-of-bounds access
Ilia Mirkin
2016-01-05
1
-0
/
+1
*
build: enable st/va with nouveau driver
Julien Isorce
2016-01-05
1
-0
/
+2
*
nvc0: add support for st/va
Julien Isorce
2016-01-05
3
-50
/
+133
*
nouveau: split nouveau_vp3_bsp in begin/next/end
Julien Isorce
2016-01-05
4
-41
/
+77
*
st/va: count number of slices
Julien Isorce
2016-01-05
5
-0
/
+25
*
i965/wm: use binding size for ubo/ssbo when automatic size is unset
Ilia Mirkin
2016-01-05
1
-4
/
+10
*
Revert "i965/wm: use proper API buffer size for the surfaces."
Ilia Mirkin
2016-01-05
4
-13
/
+5
*
st/mesa: make KHR_debug output independent of context creation flags (v2)
Nicolai Hähnle
2016-01-04
4
-57
/
+98
*
nvc0: scale up inter_bo size so that it's 16M for a 4K video
Ilia Mirkin
2016-01-04
1
-2
/
+5
*
nv50,nvc0: fix crash when increasing bsp bo size for h264
Ilia Mirkin
2016-01-04
2
-4
/
+4
*
i965/wm: use proper API buffer size for the surfaces.
Samuel Iglesias Gonsálvez
2016-01-04
4
-5
/
+13
*
radeonsi: remove unused parameter from si_shader_binary_read_config
Marek Olšák
2016-01-03
3
-10
/
+7
*
radeonsi: move si_shader_binary_upload out of si_shader_binary_read
Marek Olšák
2016-01-03
3
-11
/
+10
*
gallium/radeon: dump LLVM module outside of radeon_llvm_compile
Marek Olšák
2016-01-03
4
-9
/
+12
*
gallium/radeon: always add +DumpCode to the LLVM target machine for LLVM <= 3.5
Marek Olšák
2016-01-03
4
-6
/
+5
*
gallium/radeon: r600_can_dump_shader should get TGSI processor type directly
Marek Olšák
2016-01-03
4
-15
/
+10
*
radeonsi: pass TGSI processor type to si_shader_binary_read for dumping
Marek Olšák
2016-01-03
3
-4
/
+5
*
radeonsi: pass TGSI processor type to si_compile_llvm for dumping
Marek Olšák
2016-01-03
3
-5
/
+5
*
radeonsi: rename shader parameter definitions and variables for more clarity
Marek Olšák
2016-01-03
3
-43
/
+43
*
nvc0/ir: add support for PK2H/UP2H
Ilia Mirkin
2016-01-03
4
-2
/
+28
*
st/mesa: use PK2H/UP2H when supported
Ilia Mirkin
2016-01-03
3
-5
/
+14
*
gallium: add PIPE_CAP_TGSI_PACK_HALF_FLOAT to indicate UP2H/PK2H support
Ilia Mirkin
2016-01-03
16
-0
/
+17
*
tgsi: update PK2H/UP2H channel behavior info
Ilia Mirkin
2016-01-03
1
-8
/
+8
*
gallium: document PK2H/UP2H
Ilia Mirkin
2016-01-03
1
-2
/
+14
*
st/mesa: fix parameter names for tesseval/tessctrl prototypes
Samuel Pitoiset
2016-01-03
1
-4
/
+4
*
nouveau: fix double-const qualifier
Ilia Mirkin
2016-01-03
2
-2
/
+2
*
freedreno/ir3: use NIR_PASS helper macros
Rob Clark
2016-01-03
1
-19
/
+28
*
nir: extract out helper macros for running passes
Rob Clark
2016-01-03
2
-36
/
+43
*
freedreno/ir3: we require block_index metadata
Rob Clark
2016-01-03
1
-0
/
+2
*
freedreno/ir3: refactor NIR IR handling
Rob Clark
2016-01-03
7
-111
/
+202
*
freedreno/ir3: drop unnecessary unreachable() case
Rob Clark
2016-01-03
1
-2
/
+0
*
gallium/tests: fix build with clang compiler
Samuel Pitoiset
2016-01-03
1
-273
/
+330
*
nv50,nvc0: optimize coherent buffer checking at draw time
Samuel Pitoiset
2016-01-03
6
-68
/
+82
*
i965: Make TCS precompile use the TES primitive mode when available.
Kenneth Graunke
2016-01-02
1
-1
/
+3
*
i965: Push most TES inputs in SIMD8 mode.
Kenneth Graunke
2016-01-02
1
-12
/
+30
*
i965: Use LOAD_PAYLOAD for SIMD8 TES input loads, not MOV.
Kenneth Graunke
2016-01-02
1
-1
/
+4
*
i965: Move 3-src subnr swizzle handling into the vec4 backend.
Kenneth Graunke
2016-01-02
2
-6
/
+18
*
vc4: Fix build from upload changes.
Eric Anholt
2016-01-02
1
-1
/
+1
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