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* ac: add v2i32 to the common code and use itTimothy Arceri2017-11-033-11/+11
| | | | | Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac i64 llvm typeTimothy Arceri2017-11-031-3/+1
| | | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: remove unused i16 llvm typeTimothy Arceri2017-11-031-2/+0
| | | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac ivoidt llvm typeTimothy Arceri2017-11-031-4/+2
| | | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac i8 llvm typeTimothy Arceri2017-11-031-6/+4
| | | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac i1 llvm typeTimothy Arceri2017-11-031-3/+1
| | | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac: use the ac i32 llvm typeTimothy Arceri2017-11-031-181/+179
| | | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected] Acked-by: Nicolai Hähnle <[email protected]>
* ac/radeonsi: add support for tex instr without a derefenceTimothy Arceri2017-11-032-34/+51
| | | | | | | | | | | These are produced by nir_lower_bitmap(), adding the missing derefence would cause other issues that need to be hacked around such as skipping sampler lowering and uniform location assignment, so this change seems the correct way to go. Fixes 194 piglit crashes on radeonsi using NIR. Reviewed-by: Nicolai Hähnle <[email protected]>
* nir: skip lowering sampler if there is no dereferenceTimothy Arceri2017-11-031-1/+3
| | | | | | This avoids a crash on the output of nir_lower_bitmap(). Reviewed-by: Nicolai Hähnle <[email protected]>
* r600: add support for early depth/stencil.Dave Airlie2017-11-031-0/+3
| | | | | | | | This add support for the early depth/stencil property found on image shaders. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for emitting RAT instructions to the assembler.Dave Airlie2017-11-033-0/+35
| | | | | | | | This adds support for emitting RAT instructions to the assembler. RAT instructions are used to implement image accessors. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for mark bit to the assembler.Dave Airlie2017-11-033-0/+7
| | | | | | | | This adds support to the assembler for the mark bit on the export word1. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for valid pixel mode on CF clausesDave Airlie2017-11-032-0/+2
| | | | | | | | This just adds support to the assembler for setting the valid pixel mode on the CF clause. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for some ALU sources.Dave Airlie2017-11-031-0/+9
| | | | | | | | | | These special ALU sources provide the shader engine, simd and hw wave ids. These are required for images support. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: use the optimal packets order for dispatch callsSamuel Pitoiset2017-11-021-8/+53
| | | | | | | | | | This should reduce the time where compute units are idle, mainly for meta operations because they use a bunch of compute shaders. This seems to have a really minor positive effect for Talos, at least. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: add tess patch support to nir_remove_unused_varyings()Timothy Arceri2017-11-031-19/+42
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* es2api/ABI-check: Add es3.x symbolsDylan Baker2017-11-021-8/+125
| | | | | | | | | | | | | | Currently this ABI check only checks for es2 symbols, but es3.x symbols are also exposed. Exposing these symbols is recommended by Khronos, and as such the test should accept that as ABI. see: https://lists.freedesktop.org/archives/mesa-stable/2016-June/004545.html for the discussion about exposing these symbols cc: Ian Romanick <[email protected]> Signed-off-by: Dylan Baker <[email protected]> Tested-by: Eric Engestrom <[email protected]> Tested-by: Michel Dänzer <[email protected]>
* meson: Set c visibility args for wayland-drmDylan Baker2017-11-021-0/+1
| | | | | | | Because otherwise gbm will expose wayland symbols that it shouldn't. Signed-off-by: Dylan Baker <[email protected]> Reviewed-and-Tested-by: Eric Engestrom <[email protected]>
* st/glsl_to_nir: pass gl_shader_program to st_finalize_nir()Timothy Arceri2017-11-033-27/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: Don't expose heaps with 0 memory.Bas Nieuwenhuizen2017-11-023-53/+101
| | | | | | | | | | | | It confuses CTS. This pregenerates the heap info into the physical device, so we can use it for translating contiguous indices into our "standard" ones. This also makes the WSI a bit smarter in case the first preferred heap does not exist. Reviewed-by: Dave Airlie <[email protected]> CC: <[email protected]>
* gbm: Don't traverse backwards for includesDylan Baker2017-11-024-5/+12
| | | | | | | | | | | | | | This is just a bad idea and should be avoided. Instead, make the #include flat and fix the build systems to pass the proper -I flags v2: - add an inc_wayland_drm instead passing a path to include_directories (Emil) - update commit message (Emil) Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Daniel Stone <[email protected]> (v1) Reviewed-by: Eric Engestrom <[email protected]> (v1)
* automake: Remove unused include pathDylan Baker2017-11-021-2/+1
| | | | | | | Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* radeonsi: remove 'Authors:' commentsMarek Olšák2017-11-0251-208/+3
| | | | | | | It's inaccurate. Instead, see the copyright and use "git log" and "git blame" to know the authorship. Acked-by: Nicolai Hähnle <[email protected]>
* intel/fs: Don't allocate a param array for zero push constantsJason Ekstrand2017-11-021-1/+8
| | | | | | | | | | Thanks to the ralloc invariant of "any pointer returned from ralloc can be used as a context", calling ralloc_size with a size of zero will cause it to allocate at least a header. If we don't have any push constants, then NULL is perfectly acceptable (and even preferred). Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* intel/fs: Alloc pull constants off mem_ctxJason Ekstrand2017-11-021-1/+1
| | | | | | | | | | It doesn't actually matter since the only user of push constants, i965, ralloc_steals it back to NULL but it's more consistent and probably fixes memory leaks in some error cases. Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Cc: [email protected]
* gallivm: allow arch rounding with avx512Tim Rowley2017-11-021-1/+2
| | | | | | Fixes piglit vs-roundeven-{float,vec[234]} with simd16 VS. Reviewed-by: Roland Scheidegger <[email protected]>
* etnaviv: Allow clearing constant buffer using buffer==NULL user_buffer==NULLWladimir J. van der Laan2017-11-021-1/+1
| | | | | | | | | Prevents an assertion when using GALLIUM_HUD with ioquake3, when cso_restore_constant_buffer_slot0 restores an empty constant buffer in slot 0. Signed-off-by: Wladimir J. van der Laan <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* etnaviv: Don't flush on transfer when UNSYNCHRONIZEDWladimir J. van der Laan2017-11-021-12/+12
| | | | | | | | | Structure code to only flush when we will potentially call cpu_prep. This prevents spurious flushes in applications that heavily rely on u_uploader. Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Lucas Stach <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* etnaviv: don't do resolve-in-place without valid TSWladimir J. van der Laan2017-11-024-0/+11
| | | | | | | | | | | | GC3000 resolve-in-place assumes that the TS state is configured. If it is not, this will result in MMU errors. This is especially apparent when using glGenMipmaps(). Fixes: 78ade659569e ("etnaviv: Do GC3000 resolve-in-place when possible") Cc: [email protected] Signed-off-by: Wladimir J. van der Laan <[email protected]> Tested-by: Chris Healy <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
* radv: make radv_bind_descriptor_set() staticSamuel Pitoiset2017-11-022-6/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make sure we set buffers as shareable properly.Dave Airlie2017-11-022-2/+7
| | | | | | | | | | | This should make sure we don't treat exports buffers as local bos. Fixes: a639d40f13 (radv: add support for local bos. (v3)) Tested-by: Andres Rodriguez <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* svga: Use __asm__ instead of asmDylan Baker2017-11-013-11/+5
| | | | | | | | | | | | __asm__ is portable, and allows the svga driver to be compiled with the c99 standard instead of requiring the gnu99 standard. I have compile tested this with GCC and Clang on Linux. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Brian Paul <[email protected]> Tested-by: Brian Paul <[email protected]>
* Revert "winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx."Marek Olšák2017-11-016-15/+0
| | | | | | This reverts commit f03b7c9ad92c1656a221297819fbc6d065cc0af7. The libdrm interface is wrong.
* intel: decoder: enable decoding a single fieldLionel Landwerlin2017-11-012-0/+52
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: expose missing find_enum()Lionel Landwerlin2017-11-011-0/+2
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: extract field value computationLionel Landwerlin2017-11-011-30/+37
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: rename field() to field_value()Lionel Landwerlin2017-11-011-18/+18
| | | | | | | We would like to avoid collisions with variables named field. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: rename internal function to free nameLionel Landwerlin2017-11-011-3/+3
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: simplify field_is_header()Lionel Landwerlin2017-11-012-4/+6
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: common: make intel utils available from C++Lionel Landwerlin2017-11-013-0/+25
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: remove unused platform fieldLionel Landwerlin2017-11-011-2/+0
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: error-decode: implement a rolling window of programsLionel Landwerlin2017-11-011-14/+23
| | | | | | | | | | | | | | If we have more programs than what we can store, aubinator_error_decode will assert. Instead let's have a rolling window of programs. v2: Fix overflowing issues (Eric Engestrom) v3: Go through programs starting at idx_program (Scott) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* gallium: increase pipe_sampler_view::target bitfield size for MSVCBrian Paul2017-11-011-2/+6
| | | | | | | | | | | | | | | | | | MSVC treats enums as being signed. The 4-bit target field isn't large enough to correctly store the value 8 (for PIPE_TEXTURE_CUBE_ARRAY). The bitfield value 0x8 was being interpreted as -8 so matching the target with PIPE_TEXTURE_CUBE_ARRAY in switch statements, etc. was failing. To keep the structure size the same, we reduce the format field from 16 bits to 15. There don't appear to be any other enum bitfields which need to be adjusted. This fixes a number of Piglit cube map array tests. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* mapi: fix .so path in ABI-checkEric Engestrom2017-11-012-2/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-and-Tested-by: Michel Dänzer <[email protected]>
* intel: decoder: extract instruction/structs lengthLionel Landwerlin2017-11-012-0/+8
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: pack iterator variable declarationsLionel Landwerlin2017-11-011-11/+8
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: simplify creation of struct when 0-allocatedLionel Landwerlin2017-11-011-4/+0
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: add destructor for gen_specLionel Landwerlin2017-11-012-102/+91
| | | | | | | | This makes use of ralloc to simplify the destruction. We can also store instructions in hash tables. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: expose helper to test header fieldsLionel Landwerlin2017-11-012-3/+4
| | | | | | | | These fields are of little importance as they're used to recognize instructions. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
* intel: decoder: don't read qword outside instruction/struct limitLionel Landwerlin2017-11-012-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to print invalid data when the last field was being clamped to 32bits due to Dword Length of the whole instruction. Here is an example where the decoder read part of the next instruction instead of stopping at the 32bit limit: 0x000ce0b4: 0x10000002: MI_STORE_DATA_IMM 0x000ce0b4: 0x10000002 : Dword 0 DWord Length: 2 Store Qword: 0 Use Global GTT: false 0x000ce0b8: 0x00045010 : Dword 1 Core Mode Enable: 0 Address: 0x00045010 0x000ce0bc: 0x00000000 : Dword 2 0x000ce0c0: 0x00000000 : Dword 3 Immediate Data: 8791026489807077376 With this change we have the proper value : 0x000ce0b4: 0x10000002: MI_STORE_DATA_IMM (4 Dwords) 0x000ce0b4: 0x10000002 : Dword 0 DWord Length: 2 Store Qword: 0 Use Global GTT: false 0x000ce0b8: 0x00045010 : Dword 1 Core Mode Enable: 0 Address: 0x00045010 0x000ce0bc: 0x00000000 : Dword 2 0x000ce0c0: 0x00000000 : Dword 3 Immediate Data: 0 Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Scott D Phillips <[email protected]>
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