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* mesa: add KHR_no_error support for glUseProgramStages()Timothy Arceri2017-05-113-1/+25
| | | | Reviewed-by: Eric Anholt <[email protected]>
* mesa: create use_program_stages() helperTimothy Arceri2017-05-111-32/+39
| | | | | | | This will be used to create a KHR_no_error version of glUseProgramStages(). Reviewed-by: Eric Anholt <[email protected]>
* radv: handle fragment shader srgb resolve pass betterDave Airlie2017-05-112-11/+38
| | | | | | | | | | | Bas pointed out the fs key doesn't take srgb into account, since there is just one srgb variant, just create a separate pipeline for it. This also uses dest format to be more consistent on when srgb matters. Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders" Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* i965: Make INTEL_DEBUG=bat decode VS/CLIP/GS/SF/WM/CC_STATE on Gen4-5.Kenneth Graunke2017-05-101-1/+21
| | | | | | | | | | | | | | This is something the original decoder did, but I didn't bother with until now. I recently had to debug an Ironlake issue, and wanted to inspect VS_STATE. So, now it's back. The other packets in the switch statement are all Gen6/7+, where we use offsets from dynamic state base address, so we don't need the gtt_offset subtraction introduced here. We might want to make a helper for this hack at some point - perhaps when we introduce the next occurance. Acked-by: Jason Ekstrand <[email protected]>
* i965: Switch BRW_NEW_CURBE_OFFSETS to BRW_NEW_PUSH_CONSTANT_ALLOCATION.Kenneth Graunke2017-05-108-18/+14
| | | | | | | | | | | | The BRW_NEW_CURBE_OFFSETS dirty bit is signalled when changing the partitioning of the Constant Buffer URB section between the various shader stages, on Gen4-5. BRW_NEW_PUSH_CONSTANT_ALLOCATION is basically the same thing on Gen7+. So, save a bit, and use the new name. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Drop BRW_NEW_PUSH_CONSTANT_ALLOCATION from Gen6 code.Kenneth Graunke2017-05-101-9/+3
| | | | | | | Gen6 doesn't have a configurable push constant region. This is only used on Gen7+. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Only #if...#endif a single function or related section at a time.Kenneth Graunke2017-05-101-3/+38
| | | | | | | | | | | Previously we guarded large swathes of code with #if GEN ... #endif blocks. This made it difficult to see which generations include what. This patch splits up the #if..#endif sections so they surround a small section of code - usually a single function/atom, or sometimes a group of related functions. It should make the code easier to work on. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Turn brw_get_line_width_float() into brw_get_line_width().Kenneth Graunke2017-05-102-12/+4
| | | | | | | | | | Drop the old brw_get_line_width() helper which return the unsigned fixed-point encoding of the line width - it's been dead since the conversion to GENXML (which does the encoding for us). Then rename brw_get_line_width_float() to the shorter name. Reviewed-by: Rafael Antognolli <[email protected]>
* i965: Drop INTEL_DEBUG=stats.Kenneth Graunke2017-05-108-17/+3
| | | | | | | | | | | | | | | | For whatever reason, we had an INTEL_DEBUG=stats option that enabled various statistics counters on Gen4-5 systems. It's been around forever, though I can't think of a single time that it's been useful. On Gen6+, we enable statistics all the time because they're necessary to support various query object targets. Turning them off would break those queries. Gen4-5 don't support those queries, so the statistics counters generally aren't useful; we disabled them by default. This patch disables them altogether. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* i965: Disable ARB_pipeline_statistics_query on Gen4-5.Kenneth Graunke2017-05-101-1/+1
| | | | | | | | | | | | | | | | | | | We apparently enabled this on all platforms in Mesa 10.6. However, it was only ever implemented for Gen6+. The Gen4-5 query code goes up in flames with an "Unrecognized query target" unreachable() error if you even attempt to use any of the new functionality. This wasn't caught because the Piglit tests require OpenGL 3.0, which Gen4-5 cannot support. The extension spec does say 3.0 is required, though I'm not sure why - it seems like 2.1 would work fine. We could implement it anyway, but it's a little bit of a pain due to the lack of hardware contexts (so we have to snapshot around batches). Given that it's been 100% broken for two years and I haven't seen a bug report about it, I'm not terribly inclined to care. So, let it go. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]>
* st/mesa: move the logic of all_varyings_in_vbos into st_update_arrayMarek Olšák2017-05-103-25/+12
| | | | | | | | | | The function was pretty slow. This brings a substantial decrease in draw call overhead when min/max index bounds are not needed: Before: DrawElements (1 VBO) w/ no state change: 5.75 million After: DrawElements (1 VBO) w/ no state change: 7.03 million Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: unify common code in st_draw_vbo functionsMarek Olšák2017-05-101-27/+21
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: make st_draw_vbo staticMarek Olšák2017-05-103-14/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove upload code for zero-stride vertex attribsMarek Olšák2017-05-101-26/+8
| | | | | | | st/mesa takes care of it now. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: upload zero-stride vertex attributes hereMarek Olšák2017-05-103-16/+48
| | | | | | | | | | | This is the best place to do it. Now drivers without u_vbuf don't have to do it. v2: use correct upload size and optimal alignment Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEXMarek Olšák2017-05-1017-0/+18
| | | | | | | The next patch will use it. This is really for svga and GL2-level drivers. Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* st/mesa: simplify the signature of get_client_arrayMarek Olšák2017-05-101-10/+8
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: remove vpv->num_inputs dereferences in st_update_arrayMarek Olšák2017-05-101-20/+20
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: fold error handling into setup_(non_)interleaved_attribsMarek Olšák2017-05-101-18/+10
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: fold cso calls into setup_(non_)interleaved_attribsMarek Olšák2017-05-101-46/+45
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: don't call util_draw_init_info in st_draw_vboMarek Olšák2017-05-101-2/+8
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* gallium: remove pipe_index_buffer and set_index_bufferMarek Olšák2017-05-10107-1217/+667
| | | | | | | | | | | | | | pipe_draw_info::indexed is replaced with index_size. index_size == 0 means non-indexed. Instead of pipe_index_buffer::offset, pipe_draw_info::start is used. For indexed indirect draws, pipe_draw_info::start is added to the indirect start. This is the only case when "start" affects indirect draws. pipe_draw_info::index is a union. Use either index::resource or index::user depending on the value of pipe_draw_info::has_user_indices. v2: fixes for nine, svga
* gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytesMarek Olšák2017-05-1014-113/+152
| | | | For faster initialization of non-indirect draws.
* gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytesMarek Olšák2017-05-1080-368/+400
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* st/glsl_to_tgsi: make sure resource file for samplers is PROGRAM_SAMPLERSamuel Pitoiset2017-05-101-9/+9
| | | | | | | | Similar to how image resources are handled. That way we are sure that inst->resource.file is PROGRAM_SAMPLER for "bound" samplers. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: silent a compiler warningSamuel Pitoiset2017-05-101-1/+1
| | | | | | | | | | | | | | This fixes: si_shader.c: In function ‘si_shader_dump_stats’: si_shader.c:6704:31: warning: passing argument 1 of ‘si_get_max_workgroup_size’ discards ‘const’ qualifier from pointer target type [-Wdiscarded-qualifiers] si_get_max_workgroup_size(shader); ^~~~~~ si_shader.c:5832:17: note: expected ‘struct si_shader *’ but argument is of type ‘const struct si_shader *’ static unsigned si_get_max_workgroup_size(struct si_shader *shader) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: use u_bit_scan() in update_program_texture_state()Samuel Pitoiset2017-05-101-9/+5
| | | | | | | | | | The check in update_single_program_texture() can also be removed. v2: - remove unused 's' variable Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: remove never used gl_shader_compiler_options::EmitNoFunctionsSamuel Pitoiset2017-05-102-2/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Elie Tournier <[email protected]>
* radeonsi: dump compute descriptor listsNicolai Hähnle2017-05-101-0/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: dump both enabled and required descriptor slotsNicolai Hähnle2017-05-101-6/+12
| | | | | | This allows a meaningful dump with info == NULL (for compute shaders). Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: dump compute shader as part of debug dumpNicolai Hähnle2017-05-101-0/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move struct si_compute into a headerNicolai Hähnle2017-05-103-21/+52
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: split descriptor list dumpingNicolai Hähnle2017-05-101-16/+21
| | | | | | Prepare for dumping CS descriptor list. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: split shader dumpingNicolai Hähnle2017-05-101-12/+18
| | | | | | Prepare for dumping compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: more const qualifiers in shader dump functionsNicolai Hähnle2017-05-102-12/+12
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: implement dd_dump_launch_gridNicolai Hähnle2017-05-102-1/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: extract dd_dump_shaderNicolai Hähnle2017-05-101-74/+82
| | | | | | Will be re-used for compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: dump tokens in util_dump_shader_state only if type is TGSINicolai Hähnle2017-05-101-5/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/util: add util_dump_grid_infoNicolai Hähnle2017-05-102-0/+30
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radv: always free nir shaders from modules on stackGrazvydas Ignotas2017-05-102-8/+4
| | | | | | | | | valgrind reports them as leaked, and I could not find anything making a copy of the nir pointer. Also, radv_device_init_meta_blit_color() is already freeing them unconditionally like this. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv: don't leak DRM devicesGrazvydas Ignotas2017-05-101-0/+1
| | | | | | | | | After successful drmGetDevices2() call, drmFreeDevices() needs to be called. Fixes: b1fb6e8d "anv: do not open random render node(s)" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> # radv version
* anv: fix possible stack corruptionGrazvydas Ignotas2017-05-101-1/+1
| | | | | | | | | | drmGetDevices2 takes count and not size. Probably hasn't caused problems yet in practice and was missed as setups with more than 8 DRM devices are not very common. Fixes: b1fb6e8d "anv: do not open random render node(s)" Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/vec4: Delete the system value infastructureJason Ekstrand2017-05-0911-137/+5
| | | | | | | | | The only thing still using it is INVOCATION_ID for geometry shaders. That's easily enough inlined into the nir_intrinsic_load_invocation_id handling code. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Use NIR to do GS input remappingJason Ekstrand2017-05-099-101/+59
| | | | | | | | We're already doing this in the FS back-end. This just does the same thing in the vec4 back-end. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Move remapping of gl_PointSize to the NIR levelJason Ekstrand2017-05-092-26/+21
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/nir: Inline remap_inputs_with_vue_mapJason Ekstrand2017-05-091-27/+22
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Use NIR remapping for VS attributesJason Ekstrand2017-05-096-121/+34
| | | | | | | | | | | | | The NIR pass already handles remapping system values to attributes for us so we delete the system value code as part of the conversion. We also change nir_lower_vs_inputs to take an explicit inputs_read bitmask and pass in the inputs_read from prog_data instead from pulling it out of NIR. This is because the version in prog_data may get EDGEFLAG added to it on some old platforms. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/compiler/vs: Move inputs_read handling to generic codeJason Ekstrand2017-05-093-5/+3
| | | | | Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/vec4: Set VERT_BIT_EDGEFLAG based on the VUE mapJason Ekstrand2017-05-092-4/+11
| | | | | | | We also add a nice little comment to make it more clear exactly what happens with the edge flag copy. Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Lower gl_VertexID and friends to inputs at the NIR levelJason Ekstrand2017-05-094-70/+74
| | | | | | | | | NIR calls these system values but they come in from the VF unit as vertex data. It's terribly convenient to just be able to treat them as such in the back-end. Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
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